PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________
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`FLEX LOGIX TECHNOLOGIES INC.,
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`Petitioner
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`V.
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`VENKAT KONDA,
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`Patent Owner
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`____________
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`Case PGR2019-00037
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`Patent 10,003,553 B2
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`_________
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`MOTION TO AMEND UNDER 37 C.F.R. § 42.221
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`FLEX LOGIX EXHIBIT 1042
`Flex Logix Technologies Inc. v. Venkat Konda
`PGR2019-00042
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`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`____________
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`FLEX LOGIX TECHNOLOGIES INC.,
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`Petitioner
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`V.
`
`VENKAT KONDA,
`
`Patent Owner
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`____________
`
`Case PGR2019-00037
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`Patent 10,003,553 B2
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`_________
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`MOTION TO AMEND UNDER 37 C.F.R. § 42.221
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`Page i of 55
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`Page 1 of 55
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`FLEX LOGIX EXHIBIT 1042
`Flex Logix Technologies Inc. v. Venkat Konda
`PGR2019-00042
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
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`TABLE OF CONTENTS
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`
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`I.
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`INTRODUCTION AND STATEMENT OF RELIEF REQUESTED ..... 1
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`II.
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`PATENT OWNER'S RESPONSE TO PETITIONER'S CHALLENGES
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`3
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`A. CHALLENGE GROUND 1 ............................................................................................. 3
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`B. CHALLENGE GROUND 2 ............................................................................................. 4
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`C. CHALLENGE GROUND 3 ............................................................................................. 5
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`III. COMPLIANCE WITH STATUTORY AND REGULATORY
`REQUIREMENTS ........................................................................................ 5
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`A. The Proposed Amendments Include A Reasonable Number Of Substitute Claims ... 5
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`B. The Substitute Claims Do Not Enlarge The Scope Of The Claims Or Introduce New
`Subject Matter ................................................................................................................... 6
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`C. The Proposed Amendments Respond To A Ground Of Unpatentability Alleged By
`The Petitioner .................................................................................................................... 7
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`D. Explanation Of Substitute Claims And Support In The Original Disclosure And
`Earlier-Filed Disclosure .................................................................................................... 7
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`IV. PATENTABILITY OF THE SUBSTITUTE CLAIMS ........................... 25
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`V. CONCLUSION ............................................................................................ 26
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`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
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`I.
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`INTRODUCTION AND STATEMENT OF RELIEF REQUESTED
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`Prior to filing this motion, pursuant to 37 C.F.R. § 42.221(a) Patent Owner
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`complied with the conference call requirement with the Board on December 3,
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`2019 (Paper 15). During the call, the Board directed the parties to the Board’s
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`order in Lectrosonics, Inc. v. Zaxcom, Inc., Case IPR2018-01129, Paper 15 (PTAB
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`Feb. 25, 2019) (precedential), which provides information and guidance on
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`motions to amend, and to the Notice Regarding a New Pilot Program Concerning
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`Motion to Amend Practice and Procedures in Trial Proceedings under the America
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`Invents Act before the Patent Trial and Appeal Board, 84 Fed. Reg. 9497 (Mar. 15,
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`2019). Accordingly, Patent Owner is submitting this paper by following those
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`instructions1.
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`Patent Owner requests that claims 1-20 of U.S. Patent No. 10,003,553 (“the
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`‘553 Patent,” Ex. 1001) be cancelled and that new claims 21-40 be treated on a
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`contingent basis. See Lectrosonics, Inc. v. Zaxcom, Inc., Case IPR2018-01129,
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`(PTAB, Feb. 25, 2019) (Paper 15) (“A request to cancel claims will not be
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`regarded as contingent. However, a request to substitute claims ordinarily will be
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`1 Prior to filing this paper, in an email communication the Board approved
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`that the page limit for Patent Owner’s motion to amend is increased to 30 pages.
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`treated as contingent.”). This Motion To Amend Under 37 C.F.R. § 42.221 is made
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`on a contingent basis and is made in lieu of a response under 37 C.F.R. § 42.220.
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`This Motion satisfies the requirements for a motion to amend. Claims 1-20
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`are the challenged claims in this proceeding. Accordingly substitute claims are
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`presented for challenged claims 1-202 in Appendix. This constitutes a “reasonable
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`number of substitute claims.” 35 U.S.C. § 326(d)(1)(B). Additionally, the
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`substitute claims: (1) do not “enlarge the scope of the claims;” (2) do not
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`“introduce new [subject] matter;” and (3) “respond to [the] ground[s] of
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`unpatentability involved in the trial.” 35 U.S.C. § 326(d)(3); 37 C.F.R. §
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`42.221(a)(2)(i), (ii). Patent Owner has therefore satisfied his burden of production.
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`Patent Owner respectfully requests preliminary guidance from the Board
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`concerning this Motion, in accordance with the New Pilot Program Concerning
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`Motion to Amend Practice. See 84 Fed. Reg. 9,497 (Mar. 15, 2019).
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`
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`2 In addition to this PGR, the Board instituted another PGR2019-00042 filed
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`by the same Petitioner concurrently on the ‘553 Patent. During the conference call
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`with the Board on December 3, 2019, Patent Owner indicated to the Board that he
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`intends to move for the same amendments to the claims in both proceedings.
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`Accordingly, the same amended claims are submitted in both the proceedings, i.e.
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`PGR2019-00037 and PGR2019-00042.
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`Paper No. 16
`Patent Owner’s Motion to Amend
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`II. PATENT OWNER'S RESPONSE TO PETITIONER'S CHALLENGES
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`A. CHALLENGE GROUND 1
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`In response to the Petition, the following is submitted in the proposed substitute
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`claims 31 – 40 submitted in the Appendix: 1) Term “Zero or more cross links” in
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`Claims 1 and 11 are deleted. 2) Term “Zero or more straight links” in Claim 1 and
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`Claim 11 are deleted. 3) Terms “plurality of forward connecting links” and
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`“forward connecting links” in Claim 1 and Claim 9 are deleted. 4) Terms “plurality
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`of backward connecting links” and “backward connecting links” in Claim 1 and
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`Claim 9 are deleted. 5) Term “subnetwork(s)” in claims 1 – 3, 7 – 13, and 15 – 20
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`is substituted with “partial multi-stage hierarchical network(s)” in claims 21 – 23,
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`27 – 33, and 35 – 40. 6) Term “incoming links” in claims 1, 5, 9, 11, and 17 is
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`substituted with “inputs” in claims 21, 25, 29, 31, and 37. Furthermore, term
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`“outgoing links” in claims 1, 5, 9, 11, and 17 is substituted with “outputs” in
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`claims 21, 25, 29, 31, and 37. 7) Term “multiplexers of size
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`” is first defined
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`in claims 21 and 31 to remedy the antecedent issue. 8) Exemplary definition of
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`term “a plurality of subnetworks” and referring to it subsequently as “each
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`subnetwork” in several claims is corrected with substituted definition of term “a
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`plurality of partial multi-stage hierarchical networks” and referred to it
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`subsequently as “each partial multi-stage hierarchical network of said plurality of
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`partial multi-stage hierarchical networks” in several substitute claims, to remedy
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`the antecedent issue. All the similar antecedent issues are remedied in several
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`substitute claims. 9) Term “straight links” in claims 1 and 11 is substituted with
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`“internal connections” in claims 21 and 31. 10) Term “cross links” in claims 1, 2, 6
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`- 9, 11, 15 – 16, and 19 – 20 is substituted with “external hop wires” in claims 1, 2,
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`and 6 – 9, and substituted with “hop wires” in claims 11, 15 – 16, and 19 – 20. 11)
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`Term “incoming cross links” in claim 25 is deleted. 12) Term “outgoing cross
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`links” in claim 25 is deleted. 13) Term “number of rows” in claims 28, 36, and 40
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`is deleted. 14) Term “number of columns” in claims 28, 36 and 40 is deleted. 15)
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`Terms “higher stage”, “small in number”, and “large in number” in claims 8, 16,
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`and 20 are deleted.
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`B. CHALLENGE GROUND 2
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`In response to the Petition, the following is submitted in the proposed substitute
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`claims 31 – 40 in the Appendix: 1) The term “Flip-flop” in Claim 9 is deleted. 2)
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`Term “ stages, where
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` ” in claims 1 and 11 is substituted with “plurality of
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`stages” in claims 21 and 31, and also used in claims 27 – 30, 36 – 38 and 40. 3)
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`Term “vertical links” in claims 2 – 4 and 12 – 14 is substituted with “plurality of
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`vertical external hop wires” in claims 22 – 24 and 32 – 34. 4) Term “horizontal
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`links” in claims 2 – 4 and 12 – 14 is substituted with “plurality of horizontal
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`external hop wires” in claims 22 – 24 and 32 – 34. 5) Term “hop length
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`... where
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`” in claims 4 and 14 is remedied with “hop length
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`... where
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`” in claims
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`24 and 34. 6) Term “hop length
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`... where
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`” in claims 4 and 14 is remedied
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`with “hop length
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`... where
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`” in claims 24 and 34. 6) Term “incoming cross
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`links” in claim 25 is deleted. 7) Term “outgoing cross links” in claim 25 is deleted.
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`8) Term “final stage” in claim 19 is deleted.
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`C. CHALLENGE GROUND 3
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`In response to the Petition, the following is submitted in the proposed
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`substitute claims 31 – 40 in the Appendix: 1) Term “ stages, where
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` ” in
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`claims 1 and 11 is substituted with “a plurality of stages” in claims 21 and 31.
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`Furthermore, term “network” in claims 1 – 20 is substituted with “multi-stage
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`hierarchical network” in claims 21 – 40. 2) Term “may or may not” in claims 1 and
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`11 is deleted.
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`III. COMPLIANCE WITH STATUTORY AND REGULATORY
`REQUIREMENTS
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`A. The Proposed Amendments Include A Reasonable Number Of Substitute
`Claims
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`The proposed amendments are presented in the Appendix attached hereto,
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`pursuant to 37 C.F.R. § 42.221(b). Patent Owner cancels claims 1-20 and proposes
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`substitute claims, claim 21-40. Because the challenged claims have been cancelled
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`and substitute claims are proposed, this constitutes a “reasonable number of
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`substitute claims.” 37 C.F.R. § 42.221(a)(3). As shown in the Appendix, claims 21-
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`40 include all of the limitations of original claims 1-20. Changes in claims 1-20 are
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`shown by underlining for additions and brackets for deletions.
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`B. The Substitute Claims Do Not Enlarge The Scope Of The Claims Or
`Introduce New Subject Matter
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`Substitute claims 21-30 are based on cancelled claims 1-20, but further
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`include narrowing amendments. Substitute claims 21-40 are narrower than original
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`claims 1 – 20 because the “network” in Claims 1 – 20 is substituted with “multi-
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`stage hierarchical network” in claims 21 – 40. Term “a ring” in claims 21 and 27-
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`28 and term “at least one ring” introduced in claims 31, 36, and 40 narrows claims
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`21, 27, 28, 31, 36, and 40. Usage of term “entry stage” in claim 21 and 31 and
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`usage of term “last stage” in claims 21 and 31, for example “each inlet link of
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`said... is connected to... said switch of size
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` of [a] either said entry stage or
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`said last stage of said plurality of stages” narrows both of the independent claims
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`since each inlet and each outlet are connected to either entry stage or last stage of
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`said plurality of stages, which in turn narrows all of the dependent claims as well.
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`Definition of term “a plurality of multiplexers of size
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`” and referring to them
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`in claims 21 and 31 narrows both of the independent claims, which in turn narrows
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`all of the dependent claims as well.
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`Phrase “said switch comprising at least one input connected from one of the
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`outputs of said switch of a second stage of said plurality of stages of said ring of
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`one partial multi-stage hierarchical network of said plurality of partial multi-stage
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`hierarchical networks” in claims 21 and 31 narrows both of the independent
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`claims, which in turn narrows all of the dependent claims as well.
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`Because substitute claims 21-40 narrow the scope of claims 1-20, the
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`substitute claims do not expand the scope of the patent and thus comply with the
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`requirements of 37 C.F.R. § 42.221(a)(2)(ii).
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`C. The Proposed Amendments Respond To A Ground Of Unpatentability
`Alleged By The Petitioner
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`The proposed substitute claims respond to an asserted ground of
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`unpatentability. The substitute claims respond to Petitioner’s argument that claims
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`1-20 are unpatentable under AIA 35 U.S.C. § 112(b) as failing to particularly point
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`out and distinctly claim the subject matter (ground 1), unpatentable under AIA 35
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`U.S.C. § 112(a) as failing to satisfy the written description requirement (ground 2),
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`and Claims 1-20 are unpatentable under AIA 35 U.S.C. § 112(a) as failing to
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`satisfy the enablement requirement (ground 3).
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`D. Explanation Of Substitute Claims And Support In The Original Disclosure
`And Earlier-Filed Disclosure
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`Support for the proposed substitute claims is found in “the original disclosure of
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`the patent.” See 37 C.F.R. § 42.221(b)(1)-(2). The ‘553 patent is a continuation
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`Paper No. 16
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`application to patent application No. 14/199,168, filed on March 6, 2014 (“the ‘168
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`application”, Ex. 1005), which was granted as U.S. Patent No. 9,374,322 (“the
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`‘322 patent”, Ex. 1035) which in turn is a continuation application to PCT
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`Application No. PCT/US12/53814 (the ’814 PCT application, Ex. 1006), filed
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`September 6, 2012 which in turn is continuation-in-part and claims priority to U.S.
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`Provisional Patent Application Serial No. 61/531,615, filed September 7, 2011
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`(“the ‘615 provisional application”, Ex. 1007).
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`Exemplary support for the proposed substitute claims is provided in the following
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`table with reference to the above-identified patent applications and/or patents
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`(bracketed language for the deletions is not shown in the following table to save
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`space, but is shown in the substitute claims in the Appendix).
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`Claim 21. (Proposed substitute for original claim 1):
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`21. A multi-stage hierarchical network implemented in a non-
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`transitory medium comprising a plurality of partial multi-stage
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`hierarchical networks and a plurality of inlet links and a plurality of
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`outlet links,
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`said plurality of partial multi-stage hierarchical networks arranged in a
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`two-dimensional grid of a plurality of rows and a plurality of columns;
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`Exemplary
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`Support
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`Ex. 1001
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`8:57- 9:3,
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`9:27-61
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`and
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`each partial multi-stage hierarchical network of said plurality of partial
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`multi-stage hierarchical networks comprising a ring and said ring
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`comprising a plurality of stages; and
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`Ex. 1001
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`one of said plurality of stages comprising an entry stage and one of said
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` 5:1-3,
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`plurality of stages comprising a last stage; and
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`8:57- 9:3,
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`each stage of said plurality of stages comprising a switch of size
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`,
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`11:33-37,
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`where
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` and
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`and said switch of size
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` having
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` inputs
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`9:62-10:9,
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`and
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` outputs; and said switch of size
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` further comprising a
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`plurality of multiplexers of size
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` with each multiplexer of said
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`plurality of multiplexers of size
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` comprising
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` inputs and an
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`output; and
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`said
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` inputs of said switch of size
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`, and said
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` outputs of said
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`switch of size
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`, connected to a plurality of internal connections or
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`a plurality of external hop wires; and
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`said switch of size
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` where
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` or at least one input of said
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`
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`inputs of said switch of a first stage of said plurality of stages of said
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`ring of a first partial multi-stage hierarchical network of said plurality
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`18:44-19:2,
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`19:2-19-5,
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`17:16-22,
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`20:37-41,
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`20:42-22:53,
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`22:37-53,
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`24:48-60,
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`47:27-29
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`of partial multi-stage hierarchical networks connected from one output
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`of said
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` outputs of said switch of a second stage of said plurality of
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`stages of said ring of said first partial multi-stage hierarchical network
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`or a second partial multi-stage hierarchical network of said plurality of
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`partial multi-stage hierarchical networks, and
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`each inlet link of said plurality of inlet links is connected to one or
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`more of Said
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` inputs of said switch of size
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` of either said entry
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`stage or said last stage of said plurality of stages of one partial multi-
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`stage hierarchical network of said plurality of partial multi-stage
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`hierarchical networks, and each outlet link of said plurality of outlet
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`links is connected to one of said
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` outputs of said switch of size
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`
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`Ex. 1001
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`17:34-41
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`of either said entry stage or said last stage of said plurality of stages of
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`one partial multi-stage hierarchical network of said plurality of partial
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`multi-stage hierarchical networks; and
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`said ring of a first partial multi-stage hierarchical network of said
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`Ex. 1001
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`plurality of partial multi-stage hierarchical networks comprising the
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`20:1-16,
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`same or different number of said plurality of stages as said ring of a
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`19:6-19,
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`second partial multi-stage hierarchical network of said plurality of
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`17:22-33
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`partial multi-stage hierarchical networks; a first stage of said plurality
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`of stages comprising said switch comprising the same or different
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`number of said plurality of multiplexers as a second stage of said
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`plurality of stages; a first multiplexer in said plurality of multiplexers of
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`size
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` is the same or different size as a second multiplexer in said
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`plurality of multiplexers of size
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`; and
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`each internal connection of said plurality of internal connections
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`connected from the output of a first multiplexer of said plurality of
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`multiplexers of size
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` of said switch of a first stage of said plurality
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`of stages of said ring of a first partial multi-stage hierarchical network
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`of said plurality of partial multi-stage hierarchical networks to one
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`input of said
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` inputs of a second multiplexer of said plurality of
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`Ex. 1001
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`10:36-42
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`multiplexers of size
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` of said switch of a second stage either
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`succeeding or preceding to said first stage of said plurality of stages of
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`said ring of said first partial multi-stage hierarchical network of said
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`plurality of partial multi-stage hierarchical networks; and
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`each external hop wire of said plurality of external hop wires connected
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`from said output of one multiplexer of said plurality of multiplexers of
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`size
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` of said switch of a first two successive stages of said plurality
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`of stages of said ring of a first partial multi-stage hierarchical network
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`of said plurality of partial multi-stage hierarchical networks to one or
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`more inputs of said
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` inputs of one or more multiplexers of said
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`plurality of multiplexers
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` of said switch of said first two successive
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`stages or a second two successive stages of said plurality of stages of
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`said ring of a second partial multi-stage hierarchical network different
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`from said first partial multi-stage hierarchical network of said plurality
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`of partial multi-stage hierarchical networks.
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`Ex. 1001
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`20:37-41,
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`20:42-22:53,
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`29:3-33:25,
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`Claim 22. (Proposed substitute for original claim 2):
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`22. The multi-stage hierarchical network implemented in the non-
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`transitory medium of claim 21 wherein said plurality of external hop
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`wires are connected as either vertical links (hereinafter “plurality of
`
`vertical external hop wires”) only, or horizontal links (hereinafter
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`Ex. 1001
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`22:37-22:63
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`“plurality of horizontal external hop wires”) only.
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`Claim 23. (Proposed substitute for original claim 3):
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`23. The multi-stage hierarchical network implemented in the non-
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`transitory medium of claim 22 wherein each partial multi-stage
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`hierarchical network of said plurality of partial multi-stage hierarchical
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`networks is replicated in either said plurality of rows or said plurality of
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`columns of the two-dimensional grid, or
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`each partial multi-stage hierarchical network of the plurality of partial
`
`multi-stage hierarchical networks with said plurality of horizontal
`
`external hop wires and said plurality of vertical external hop wires are
`
`replicated in either said plurality of rows or said plurality of columns of
`
`Ex. 1001
`
`9:27-61,
`
`14:4-27
`
`the two-dimensional grid.
`
`Claim 24. (Proposed substitute for original claim 4):
`
`
`
`24. The multi-stage hierarchical network implemented in the non-
`
`transitory medium of claim 22, wherein said plurality of horizontal
`
`external hop wires between switches in two said stages are substantially
`
`of equal length and said plurality of vertical external hop wires between
`
`Ex. 1001
`
`switches in two said stages are substantially of equal length in the two-
`
`22:37-22:63
`
`dimensional grid of said plurality of rows and said plurality of columns,
`
`or
`
`said plurality of horizontal external hop wires between switches in two
`
`
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`Page 13 of 55
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`Page 15 of 55
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`said stages are substantially of hop length
`
` and said plurality of
`
`vertical external hop wires between switches in two said stages are
`
`substantially of hop length
`
` where
`
` and
`
`.
`
`Claim 25. (Proposed substitute for original claim 5):
`
`
`
`25. The multi-stage hierarchical network implemented in the non-
`
`transitory medium of claim 21, wherein said plurality of inlet links and
`
`Ex. 1001
`
`said plurality of outlet links are connected to a computational block
`
`3:63-65
`
`comprising Lookup Tables, or memory blocks, or DSP blocks.
`
`Claim 26. (Proposed substitute for original claim 6):
`
`
`
`26. The multi-stage hierarchical network implemented in the non-
`
`transitory medium of claim 23, comprises either generalized multi-stage
`
`pyramid network, or generalized folded multi-stage pyramid network,
`
`or generalized butterfly fat pyramid network, or generalized multi-link
`
`multi-stage pyramid network, or generalized folded multi-link multi-
`
`stage pyramid network, or generalized multi-link butterfly fat pyramid
`
`Ex. 1001
`
`8:32-55
`
`network.
`
`Claim 27. (Proposed substitute for original claim 7):
`
`
`
`27. The multi-stage hierarchical network implemented in the non-
`
`Ex. 1001
`
`
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`Page 14 of 55
`
`
`h
`
`v
`
`1h
`
`1v
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`Page 16 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`transitory medium of claim 26, wherein said plurality of hop wires are
`
`29:3-33:25
`
`connected from said plurality of stages of said ring in a random order.
`
`Claim 28. (Proposed substitute for original claim 8):
`
`
`
`28. The multi-stage hierarchical network implemented in the non-
`
`transitory medium of claim 26, wherein said switch of size
`
` of
`
`one or more stages of said plurality of stages of said ring of said one or
`
`Ex. 1001
`
`more partial multi-stage hierarchical networks of said plurality of
`
`18:44-19:5
`
`partial multi-stage hierarchical networks where
`
` and
`
`.
`
`
`
`Claim 29. (Proposed substitute for original claim 9):
`
`
`
`29. The multi-stage hierarchical network implemented in the non-
`
`transitory medium of claim 24, wherein said plurality of external hop
`
`wires are implemented in two or more metal layers, or
`
`each switch of size
`
` of each stage of said plurality of stages is
`
`configurable by an SRAM cell or a Flash Cell, or
`
`Ex. 1001
`
`47:3-21,
`
`47:27-29,
`
`47:22-26,
`
`17:42-19:5
`
`said plurality of internal connections and said plurality of external hop
`
`Ex. 1006
`
`wires use a plurality of buffers to amplify signals driven through them;
`
`Page 80, lines
`
`and said buffers are either inverting or non-inverting buffers, or
`
`22-23
`
`
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`Page 15 of 55
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`8id
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`4od
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`d i
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`0d
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`d i
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`0d
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`Page 17 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
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`
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`said switch in one or more stages of said plurality of stages in said
`
`
`
`plurality of partial multi-stage hierarchical networks comprising six 2:1
`
`multiplexers, or eight 2:1 multiplexers, or four 2:1 multiplexers, or two
`
`2:1 multiplexers.
`
`Claim 30. (Proposed substitute for original claim 10):
`
`
`
`30. The multi-stage hierarchical network implemented in the non-
`
`Ex. 1001
`
`transitory medium of claim 21, wherein said switch of size
`
` of
`
`47:16-21
`
`each stage of said plurality of stages is either fully populated or
`
`Ex. 1006
`
`partially populated, or
`
`Page 82, lines
`
`said plurality of partial multi-stage hierarchical networks are
`
`22-23
`
`implemented in a 3D integrated circuit device.
`
`Claim 31. (Proposed substitute for original claim 11):
`
`31. A multi-stage hierarchical network implemented in a non-
`
`
`
`
`
`transitory medium comprising a plurality of partial multi-stage
`
`Ex. 1001
`
`hierarchical networks and a plurality of inlet links and a plurality of
`
`8:57- 9:3,
`
`outlet links,
`
`9:27-61
`
`said plurality of partial multi-stage hierarchical networks arranged in a
`
`
`
`two-dimensional grid of a plurality of rows and a plurality of columns;
`
`
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`Page 16 of 55
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`d i
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`0d
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`Page 18 of 55
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`and
`
`each partial multi-stage hierarchical network of said plurality of partial
`
`multi-stage hierarchical networks comprising at least one ring and each
`
`ring of said at least one ring comprising a plurality of stages; and
`
`Ex. 1001
`
`one of said plurality of stages comprising an entry stage and one of said
`
` 5:1-3,
`
`plurality of stages comprising a last stage; and
`
`8:57- 9:3,
`
`each stage of said plurality of stages comprising a switch of size
`
`,
`
`11:33-37,
`
`where
`
` and
`
`and said switch of size
`
` having
`
` inputs
`
`and
`
` outputs; and said switch of size
`
` further comprising a
`
`plurality of multiplexers of size
`
` with each multiplexer of said
`
`plurality of multiplexers of size
`
` comprising
`
` inputs and an
`
`output; and
`
`said
`
` inputs of said switch of size
`
`, and said
`
` outputs of said
`
`switch of size
`
`, connected to a plurality of internal connections or
`
`a plurality of hop wires; and said plurality of hop wires further
`
`9:62-10:9,
`
`18:44-19:2,
`
`19:2-19-5,
`
`17:16-22,
`
`20:37-41,
`
`20:42-22:53,
`
`22:37-53,
`
`24:48-60,
`
`47:27-29
`
`comprising a plurality of internal hop wires and a plurality of external
`
`
`
`hop wires; and
`
`
`
`
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`Page 17 of 55
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`2id
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`2od
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`d i
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`0d
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`id
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`0d
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`d i
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`0d
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`2d
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`2d
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`d
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`id
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`d i
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`0d
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`0d
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`d i
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`0d
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`Page 19 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`said switch of size
`
` where
`
` or at least one input of said
`
`
`
`inputs of said switch of a first stage of said plurality of stages of a first
`
`ring of said at least one ring of a first partial multi-stage hierarchical
`
`network of said plurality of partial multi-stage hierarchical networks
`
`connected from one output of said
`
` outputs of said switch of a second
`
`stage of said plurality of stages of a second ring of said at least one ring
`
`of said first partial multi-stage hierarchical network or a second partial
`
`multi-stage hierarchical network of said plurality of partial multi-stage
`
`hierarchical networks, and
`
`each inlet link of Said plurality of inlet links is connected to one or
`
`more of said
`
` inputs of said switch of size
`
` of either said entry
`
`stage or said last stage of said plurality of stages of one partial multi-
`
`stage hierarchical network of said plurality of partial multi-stage
`
`hierarchical networks, and each outlet link of said plurality of outlet
`
`links is connected to one of said
`
` outputs of said switch of size
`
`
`
`Ex. 1001
`
`17:34-41
`
`of either said entry stage or said last stage of said plurality of stages of
`
`one partial multi-stage hierarchical network of said plurality of partial
`
`multi-stage hierarchical networks; and
`
`
`
`Page 18 of 55
`
`
`d
`i
`
`d
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`o
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`id
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`d i
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`0d
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`0d
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`d i
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`0d
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`d i
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`0d
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`id
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`0d
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`Page 20 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
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`
`
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`a first partial multi-stage hierarchical network of said plurality of partial
`
`multi-stage hierarchical networks comprising the same or different
`
`number of said at least one ring as a second partial multi-stage
`
`hierarchical network of said plurality of partial multi-stage hierarchical
`
`networks; a first ring of said at least one ring of a first partial multi-
`
`stage hierarchical network of said plurality of partial multi-stage
`
`hierarchical networks comprising the same or different number of said
`
`plurality of stages as a second ring of said at least one ring of the said
`
`first or a second partial multi-stage hierarchical network of said
`
`plurality of partial multi-stage hierarchical networks; a first stage of
`
`said plurality of stages comprising said switch comprising the same or
`
`different number of said plurality of multiplexers as a second stage of
`
`said plurality of stages; a first multiplexer in said plurality of
`
`multiplexers of size
`
` is the same or different size as a second
`
`multiplexer in said plurality of multiplexers of size
`
`; and
`
`Ex. 1001
`
`20:1-16,
`
`19:6-19,
`
`17:22-33
`
`each internal connection of said plurality of internal connections
`
`connected from the output of a first multiplexer of said plurality of
`
`Ex. 1001
`
`multiplexers of size
`
` of said switch of a first stage of said plurality
`
`10:36-42
`
`of stages of a first ring of said at least one ring of a first partial multi-
`
`
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`Page 19 of 55
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`
`2d
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`2d
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`2d
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`Page 21 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
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`Paper No. 16
`Patent Owner’s Motion to Amend
`
`stage hierarchical network of said plurality of partial multi-stage
`
`hierarchical networks to one input of said
`
` inputs of a second
`
`multiplexer of said plurality of multiplexers of size
`
` of said switch
`
`of a second stage either succeeding or preceding to said first stage of
`
`said plurality of stages of said ring of said at least one ring of said first
`
`partial multi-stage hierarchical network of said plurality of partial
`
`multi-stage hierarchical networks; and
`
`each internal hop wire of said plurality of internal hop wires is
`
`connected from the output of a first multiplexer of said plurality of
`
`multiplexers of size
`
` of said switch of a first two successive stages
`
`of said plurality of stages of a first ring of said at least one ring to a first
`
`input of said
`
` inputs of a second multiplexer of said plurality of
`
`multiplexers size
`
` of said switch of said first two successive stages
`
`or a second two successive stages of said plurality of stages of a second
`
`ring of said at least one ring different from the first ring of said at least
`
`one ring of the same partial multi-stage network of said plurality of
`
`Ex. 1001
`
`20:37-41,
`
`20:42-22:53,
`
`29:3-33:25
`
`partial multi-stage networks; and
`
`each external hop wire of said plurality of external hop wires connected
`
`
`
`Page 20 of 55
`
`
`2d
`
`2d
`
`d
`
`2d
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`d
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`Page 22 of 55
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`
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`PGR2019-00037
`Patent 10,003,553
`
`
`
`
`Paper No. 16
`Patent Owner’s Motion to Amend
`
`from said output of one multiplexer of said plurality of multiplexers of
`
`size
`
` of said switch of a first two successive stages of said plurality
`
`of stages of a first ring of said at least one ring of a first partial multi-
`
`stage hierarchical network of said plurality of partial multi-stage
`
`hierarchical networks to one or more inputs of said
`
` inputs of one or
`
`more multiplexers of said plurality of multiplexers
`
` of said switch
`
`of said first two successive stages or a second two successive stages of
`
`said plurality of stages of a second ring of said at least one ring of a
`
`second partial multi-stage hierarchical network different from said first
`
`pa
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