Datasheet
`
`®
`
`IMPINJ
`® R6
`MONZA
`
`TAG CHIP DATASHEET
`IPJ-W1700
`
`Version 5.0
`
`© 2017, Impinj, Inc.
`
`www.impinj.com
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`
`
`OVERVIEW
`The Monza® R6 UHF RFID tag chip is optimized for serializing items such as apparel,
`electronics, cosmetics, documents and jewelry. It delivers unmatched read performance and
`data integrity for effective RFID business systems and record-breaking encoding performance
`to enable the lowest applied tag cost. The Monza R6 tag chip includes revolutionary
`technologies such as automatic performance adjustments and encoding diagnostics that
`reinforce the position of the Monza tag chip family as the RFID industry leader.
`
`•
`
`FEATURES
`Industry leading read sensitivity of up to -22.1 dBm with a dipole antenna, combined with
`•
`excellent interference rejection, delivers exceptional read reliability
`• Superior write sensitivity of up to -18.8 dBm with a dipole antenna for unparalleled
`encoding reliability
`Inlay compatibility between all Monza 6 family of tag chips (Monza R6, Monza R6-A, Monza
`R6-P, and Monza S6-C)
`• Fast memory write speed of 1.6 ms for 32 bits
`• Encoding throughput up to 9,500 tags/minute using the Impinj STP® source tagging
`platform
`• Up to 96 bits of EPC memory
`• 96 bits of Serialized TID with 48-bit serial number
`• EPCglobal and ISO 18000-63 compliant, Gen2v2 compliant
`• Unmatched data integrity with Integra™ Technology for encoding diagnostics
`• Maintains performance across different dielectrics with AutoTune™ Technology
`• Reduced tag manufacturing variability via patent-pending Enduro™ Technology
`• FastID™ mode enables 2x to 3x faster EPC+TID inventory for authentication and other TID-
`based applications
`• TagFocus™ mode suppresses previously read tags to enable capture of more tags
`• Scalable serialization built-in with Monza Self-Serialization
`Impinj’s field-rewritable NVM, optimized for RFID, provides 100,000-cycle or 50-year
`•
`retention reliability
`
`© 2017, Impinj, Inc. // Version 5.0
`
`i
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`1
`
`TABLE OF CONTENTS
`Overview ................................................................................................................................................................................... i
`Features .................................................................................................................................................................................... i
`Introduction ........................................................................................................................................................ 1
`1.1 Scope ............................................................................................................................................................................. 1
`1.2 Reference Documents ................................................................................................................................................... 1
`2 Functional Description ..................................................................................................................................... 2
`2.1 Memory .......................................................................................................................................................................... 2
`2.2 Advanced Monza Features Support More Effective Inventory ....................................................................................... 3
`2.3 Support for Optional Gen2 Commands .......................................................................................................................... 3
`2.4 Data Integrity Features (Integra™ technology) .............................................................................................................. 3
`2.4.1 Memory Self-Check .................................................................................................................................................. 3
`2.4.2 TID Parity ................................................................................................................................................................. 4
`2.4.3 MarginRead Command ............................................................................................................................................ 4
`2.4.4 Recommended MarginRead Usage Guidelines ....................................................................................................... 5
`2.5 Monza R6 Tag Chip Block Diagram ............................................................................................................................... 6
`2.6 Pad Descriptions ............................................................................................................................................................ 6
`2.7 Differential Antenna Input............................................................................................................................................... 6
`2.8 Monza 6 Antenna Reference Designs ........................................................................................................................... 7
`2.9 Monza R6 Tag Chip Dimensions ................................................................................................................................... 7
`2.10 Power Management ..................................................................................................................................................... 8
`2.11 AutoTune ...................................................................................................................................................................... 8
`2.12 Modulator/Demodulator ................................................................................................................................................ 8
`2.13 Tag Controller ............................................................................................................................................................... 8
`2.14 Nonvolatile Memory ...................................................................................................................................................... 8
`Interface Characteristics .................................................................................................................................. 9
`3.1 Making Connections ...................................................................................................................................................... 9
`3.2
`Impedance Parameters .................................................................................................................................................. 9
`3.3 Reader-to-Tag (Forward Link) Signal Characteristics .................................................................................................. 11
`3.4 Tag-to-Reader (Reverse Link) Signal Characteristics .................................................................................................. 12
`4 Tag Memory ..................................................................................................................................................... 13
`4.1 Monza R6 Tag Chip Memory Map ............................................................................................................................... 13
`4.2 Memory Banks ............................................................................................................................................................. 14
`4.2.1 Reserved Memory .................................................................................................................................................. 14
`4.3
`Logical vs. Physical Bit Identification ........................................................................................................................... 15
`4.3.1 EPC Memory (EPC data, Protocol Control Bits, and CRC16) ................................................................................ 15
`4.3.2 Tag Identification (TID) Memory ............................................................................................................................. 16
`4.3.3 User Memory .......................................................................................................................................................... 16
`5 Absolute Maximum Ratings ........................................................................................................................... 17
`5.1 Temperature ................................................................................................................................................................ 17
`5.2 Electrostatic Discharge (ESD) Tolerance ..................................................................................................................... 17
`5.3 NVM Use Model ........................................................................................................................................................... 17
`6 Ordering Information ...................................................................................................................................... 18
`7 Notices .............................................................................................................................................................. 18
`
`
`3
`
`
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`ii
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`1
`
`INTRODUCTION
`
`1.1 Scope
`This datasheet defines the physical and logical specifications for Gen2-compliant Monza R6 tag silicon, a reader-
`talks-first, radio frequency identification (RFID) component operating in the UHF frequency range.
`
`1.2 Reference Documents
`EPCTM Radio Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for Communications at 860
`MHz – 960 MHz (Gen2 Specification). The conventions used in the Gen2 Specification (normative references,
`terms and definitions, symbols, abbreviated terms, and notation) were adopted in the drafting of this Monza R6
`Tag Chip Datasheet. Users of this datasheet should familiarize themselves with the Gen2 Specification.
`
`Impinj Monza R6 Wafer Specification
`
`Impinj Monza Wafer Map Orientation
`
`EPC™ Tag Data Standards Specification 1.7
`
`EPCglobal “Interoperability Test System for EPC Compliant Class-1 Generation-2 UHF RFID Devices” v.1.2.4,
`August 4, 2006
`
`• Monza R6 tag chips are compliant with this Gen2 interoperability standard.
`
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`1
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`2 FUNCTIONAL DESCRIPTION
`
`The Monza R6 tag chip fully supports all requirements of the Gen2 specification as well as many optional
`commands and features (see section 2.3 below). In addition, the Monza tag chip family provides a number of
`enhancements:
`• Superior sensitivity for high read and write reliability
`
`•
`
`Industry-leading memory write speed, delivering the highest encoding rates
`
`• TagFocus™ inventory mode, a Gen2 compliant method for capturing more hard-to-read tags by
`suppressing those that have already been read, by extending their S1 flag B-state
`
`• FastID™ inventory mode, a Gen2 compliant, patent-pending method for EPC+TID based inventory that is
`2-3 times faster than previous methods
`
`• A patent-pending Enduro™ technology makes inlay manufacture less sensitive to die-attach pressure,
`resulting in less variance and more predictable performance in final inlay product
`
`• AutoTune™ technology allows Monza R6 inlays to maintain high performance independent of the tagged
`items dielectric. In addition smaller form factor designs can meet bandwidth requirements with AutoTune.
`Smaller antennas reduce manufacturing cost and increase the number of applications.
`
`•
`
`Integra™ technology, a suite of diagnostics which ensures consistently accurate data delivery that
`business can depend on
`
`2.1 Memory
`Optimized for item-level tagging, Monza R6 tag chips offer EPC memory of up to 96 bits, serialized TID. Monza
`R6 does not have any user programmable passwords. As per the Gen2 specifications the passwords are
`PermaReadLocked and set to zero. It follows that Monza R6 is not killable and does not utilize the Access
`command. See Table 2-1 for the memory organization.
`
`Table 2-1 Monza R6 Memory Organization
`
`MEMORY SECTION
`
`DESCRIPTION
`
`User
`
`None
`
`TID
`(not changeable)
`
`Serial Number—48 bits
`
`Extended TID Header—16 bits
`
`Company/Model Number—32 bits
`
`EPC
`
`Up to 96 bits
`
`AutoTune Disable and Readout
`
`Reserved
`
`Kill Password - None
`
`Access Password - None
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`2
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`2.2 Advanced Monza Features Support More Effective Inventory
`Monza tag chips support two unique, patent-pending features designed to boost inventory performance for
`traditional EPC and TID-based applications:
`• TagFocus™ mode minimizes redundant reads of strong tags, allowing the reader to focus on weak tags
`that are typically the last to be found. Using TagFocus, readers can suppress previously read tags by
`indefinitely refreshing their S1 B state.
`
`• FastID™ mode makes TID-based applications such as authentication practical by boosting TID-based
`inventory speeds by 2 to 3 times. Readers can inventory both the EPC and the TID without having to
`perform an access command. Setting the EPC word length to zero enables TID-only serialization.
`
`2.3 Support for Optional Gen2 Commands
`Monza R6 tag chips support the optional commands listed in Table 2-2.
`
`Table 2-2 Supported Optional Gen2 Specification Commands
`
`COMMAND
`
`CODE
`
`LENGTH
`(BITS)
`
`DETAILS
`
`BlockWrite 11000111
`
`>57
`
`Lock
`
`11000101
`
`60
`
`• Accepts valid one-word commands
`
`• Accepts valid two-word commands if pointer is an even
`value
`
`• Returns error code (000000002) if it receives a valid two-
`word command with an odd value pointer
`
`• Returns error code (000000002) if it receives a command
`for more than two words
`
`• Does not respond to block write commands of zero words
`
`• Monza R6 uses an alternative version of the lock command
`
`• There is only a single lock bit which is described in the
`Gen2 specification
`
`• To permalock all of the memory a lock command must be
`sent with a payload of all ones FFFFFh.
`
`2.4 Data Integrity Features (Integra™ technology)
`Monza R6 has several data integrity features that enhance encoding and data reliability. These features include
`memory self-check, TID parity, and the MarginRead command.
`
`2.4.1 Memory Self-Check
`Monza R6 performs a memory check on its NVM at every power-up. If a bit is weakly encoded an internal flag is
`set. When the tag is singulated it will respond back with a zero length EPC. A reader could then consider this tag
`for exception handling.
`
`© 2017, Impinj, Inc. // Version 5.0
`
`3
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`2.4.2 TID Parity
`Monza R6 is encoded with even parity over the 48 bit serial number portion of the TID. A reader should calculate
`even parity with bitwise exclusive-OR as follows.
`• X = TID bit(30h)  TID bit(31h)  …  TID bit(5Eh)  TID bit(5Fh)
`
`If X = 0 the TID data is good
`
`If X = 1 the TID data has an error in it
`
`•
`
`•
`
`
`
`2.4.3 MarginRead Command
`Table 2-3, Table 2-4, and
`Table 2-5 provide details about the custom Impinj MarginRead command.
`
`Table 2-3 MarginRead Command Code
`
`COMMAND
`
`CODE
`
`LENGTH
`(BITS)
`
`DETAILS
`
`MarginRead 1110000000000001
`
`≥67
`
`• The MarginRead command allows checking for
`sufficient write margin of known data
`
`• The tag must be in the OPEN/SECURED state to
`respond to the command
`
`•
`
`If a tag receives a MarginRead command with an
`invalid handle, it ignores that command
`
`• The tag responds with the Insufficient Power error
`code if the power is too low to execute a MarginRead
`
`• The tag responds with the Other error code if the
`margin is bad for a bit in the mask or if a non-
`matching bit is sent by the reader
`
`• The MarginRead command is only applicable for
`programmable sections of the memory
`
`Table 2-4 MarginRead Command Details
`
`MARGINREAD
`COMMAND
`
`CODE
`
`MEM
`BANK
`
`BIT
`POINTER
`
`LENGTH
`
`MASK
`
`RN
`
`CRC-16
`
`#bits
`
`16
`
`2
`
`EBV
`
`8
`
`Variable
`
`16
`
`16
`
`Details
`
`11100000
`00000001
`
`00: Reserved
`01: EPC
`10: TID
`11: User
`
`Starting
`Bit
`Address
`Pointer
`
`Length in Bits
`
`Mask
`Value
`
`handle
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`4
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`Table 2-5 MarginRead Command Field Descriptions
`
`
`
`FIELD
`
`DESCRIPTION
`
`Mem Bank
`
`The memory bank to access.
`
`Bit Pointer
`
`An EBV that indicates the starting bit address of the mask
`
`Length
`
`Mask
`
`Length of the mask field from 1-255.
`
`A value of zero shall result in the command being ignored
`
`This field must match the expected values of the bits
`
`The chip checks that each bit matches what is in the mask field with margin
`
`RN
`
`The tag will ignore any MarginRead command received with an invalid handle
`
`
`
`The tag response to the MarginRead Command uses the preamble specified by the TRext value in the Query
`command that initiated the round. See Table 2-6 for tag response details.
`
`Table 2-6 Tag Response to a Passing MarginRead Command
`
`
`
`HEADER
`
`RN
`
`CRC-16
`
`#bits
`
`Description
`
`1
`
`0
`
`16
`
`handle
`
`16
`
`
`
`
`
`2.4.4 Recommended MarginRead Usage Guidelines
`There are several ways that the MarginRead command could be used with Monza R6. Monza R6 comes pre-
`serialized and the MarginRead command allows a programming reader to check that the pre-serialized data is
`well written and does not need to be re-encoded. Another recommended use of MarginRead is secondary and
`independent verification of the encoding quality. MarginRead can also be used for diagnosis when doing failure
`
`analysis on tags.
`
`© 2017, Impinj, Inc. // Version 5.0
`
`5
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`2.5 Monza R6 Tag Chip Block Diagram
`
`
`Figure 2-1 Block Diagram
`
`
`
`2.6 Pad Descriptions
`Monza R6 tag chips have two external pads available to the user: one RF+ pad, and one RF- pads. RF+ and RF-
`form a single differential antenna port. See Table 2-7 (also see
`
`Figure 2-1 and Figure 2-2). Note that none of these pads connects to the chip substrate.
`
`Table 2-7 Pad Descriptions
`
`EXTERNAL SIGNALS
`
`EXTERNAL PAD
`
`DESCRIPTION
`
`RF+
`
`RF-
`
`1
`
`2
`
`Differential RF Input Pads for Antenna.
`
`2.7 Differential Antenna Input
`All interaction with the Monza R6 tag chip, including generation of its internal power, air interface, negotiation
`sequences, and command execution, occurs via its differential antenna port. The differential antenna port is
`connected with the RF+ pad connected to one terminal and the RF- pad connected to the other terminal.
`
`© 2017, Impinj, Inc. // Version 5.0
`
`6
`
`
`
`AutoTune
`
`POWER
`MANAGEMENT
`
`RF+
`
`RF-
`
`MODULATOR/
`DEMODULATOR
`
`TAG
`CONTROLLER
`
`NONVOLATILE
`MEMORY
`(NVM)
`
`OSCILLATOR
`
`ANALOG FRONT END
`
`DIGITAL CONTROL
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`RF+
`
`RF-
`
`Figure 2-2 R6 Tag Chip Die Orientation
`
`
`
`2.8 Monza 6 Antenna Reference Designs
`All Monza 6 family of tag chips (Monza R6, Monza R6-A, Monza R6-P, and Monza S6-C) are designed to be
`drop-in compatible for antenna inlay designs. Impinj has a set of reference designs available for use by Monza
`customers under terms of the Impinj Antenna License Agreement.
`
`These reference designs are available here:
`
` https://support.impinj.com/hc/en-us/sections/200454558-Monza-Reference-Design-Documents-Downloads
`
`These documents are restricted. To gain access if these documents cannot be accessed, submit a request for
`access using the following link. Make sure to select the option “Monza Antenna Reference Designs”.
`
`https://access.impinj.com/prtlaccessrequest
`
`2.9 Monza R6 Tag Chip Dimensions
`The Monza R6 features a 464.1 µm x 400 µm rectangular die size.
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`7
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`2.10 Power Management
`The tag is activated by proximity to an active reader. When the tag enters a reader’s RF field, the Power
`Management block converts the induced electromagnetic field to the DC voltage that powers the chip.
`
`2.11 AutoTune
`The AutoTune block adjusts Monza R6 power harvesting from the inlay antenna by adjusting the chip’s input
`capacitance. This adjustment occurs at power up and is held for the remainder of the time that Monza R6 is
`powered.
`
`2.12 Modulator/Demodulator
`The Monza R6 tag chip demodulates any of a reader's three possible modulation formats, DSB-ASK, SSB-ASK,
`or PR-ASK with PIE encoding. The tag communicates to a reader via backscatter of the incident RF waveform by
`switching the reflection coefficient of its antenna pair between reflective and absorptive states. Backscattered data
`is encoded as either FM0 or Miller subcarrier modulation (with the reader commanding both the encoding choice
`and the data rate).
`
`2.13 Tag Controller
`The Tag Controller block is a finite state machine (digital logic) that carries out command sequences and also
`performs a number of overhead duties.
`
`2.14 Nonvolatile Memory
`The Monza R6 tag chip embedded memory is nonvolatile memory (NVM) cell technology, specifically optimized
`for exceptionally high performance in RFID applications. All programming overhead circuitry is integrated on chip.
`Monza R6 tag chip NVM provides 100,000 cycle endurance or 50-year data retention.
`
`The NVM block is organized into two segments:
`
`• EPC Memory with up to 96 bits
`
`• Reserved Memory (which contains the AutoTune Disable bit).
`
`The ROM-based Tag Identification (TID) memory contains the EPCglobal class ID, the manufacturer
`identification, and the model number. It also contains an extended TID consisting of a 16-bit header and 48-bit
`serialization.
`
`
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`8
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`3
`
`INTERFACE CHARACTERISTICS
`
`This section describes the RF interface of the tag chip and the modulation characteristics of both communication
`links: reader-to-tag (Forward Link) and tag-to-reader (Reverse Link).
`
`3.1 Making Connections
`Figure 3-3 shows antenna connection for Monza R6 tag chips.
`
`
`Figure 3-3 Antenna Connection for Inlay Production
`
`
`
`This connection configuration for inlay production contacts the Monza R6 tag chip RF+ pad to one antenna
`terminal and the RF- pad to the opposite polarity terminal. Enduro pads allow relatively coarse antenna geometry,
`and thus enable relaxed resolution requirements for antenna patterning compared to bumped products. The
`diagram in Figure 3-3 shows the recommended antenna trace arrangement and chip placement – having antenna
`traces partially overlapping the Enduro pads but not extending into the clear space between Enduro pads.
`
`Impedance Parameters
`
`3.2
`
`
`In order to realize the full performance potential of the Monza R6 tag chip, it is imperative that the antenna
`present the appropriate impedance at its terminals. A simplified lumped element tag chip model, shown in Figure
`3-4, is the conjugate of the optimum source impedance, which is not equal to the chip input impedance. This
`indirect, source-pull method of deriving the port model is necessary due to the non-linear, time-varying nature of
`the tag RF circuits. The model is a good mathematical fit for the chip over a broad frequency range.
`
`The lumped element values are listed in Table 3-8, where Cmount is the parasitic capacitance due to the antenna
`trace overlap with the chip surface, Cp appears at the chip terminals and is intrinsic to the chip, and Rp represents
`the energy conversion and energy absorption of the RF circuits.
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`9
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`Figure 3-4 Tag Chip Linearized RF Model
`
`
`
`
`
`Table 3-8 shows the values for the chip port model for the Monza R6 tag chip, which apply to all frequencies of
`the primary regions of operation (North America, Europe, and Japan).
`
`Table 3-8 R6 Chip Port Parameters
`
`PARAMETER
`
`TYPICAL VALUE
`
`COMMENTS
`
`Cp
`
`Rp
`
`1.23 pF
`
`1.2 kOhm
`
`Cmount
`
`0.21 pF
`
`Chip Read Sensitivity
`
`- 20 dBm
`
`Chip Write Sensitivity
`
`- 16.7 dBm
`
`Intrinsic chip capacitance when AutoTune
`is mid-range, including Enduro pads.
`
`Calculated for linearized RF model shown
`in Figure 3-2. Measured Rp = 1.56 kOhm
`using network analyzer.
`
`Typical capacitance due to adhesive and
`antenna mount parasitics. Total load
`capacitance presented to antenna model
`of Figure 3-2 is:
`Cp + Cmount
`
`Measured at 25 °C; R=>T link using DSB-
`ASK modulation with 90% modulation
`depth, Tari=25 µs, and a T=>R link
`operating at 170 kbps with Miller M=8
`encoding.
`
`
`
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`10
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`3.3 Reader-to-Tag (Forward Link) Signal Characteristics
`Table 3-9 Forward Link Signal Parameters
`
`PARAMETER
`
`MINIMUM
`
`TYPICAL
`
`MAXIMUM
`
`UNITS
`
`COMMENTS
`
`RF Characteristics
`
`Carrier Frequency
`
`860
`
`Maximum RF Field
`Strength
`
`Modulation
`
`Data Encoding
`
`Modulation Depth
`
`Ripple, Peak-to-Peak
`
`Rise Time (tr,10-90%)
`
`Fall Time (tf,10-90%)
`
`Tari1
`
`PIE Symbol Ratio
`
`Duty Cycle
`
`Pulse Width
`
`
`
`
`
`
`
`
`
`80
`
`
`
`0
`
`0
`
`6.25
`
`1.5:1
`
`48
`
`MAX(0.26
`5Tari,2)
`
`
`
`
`
`
`
`DSB-ASK,
`SSB-ASK,
`or PR-ASK
`
`PIE
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`960
`
`MHz
`
`North America: 902–928 MHz
`Europe: 865–868 MHz
`
`+20
`
`dBm
`
`Received by a tag with dipole antenna while
`sitting on a maximum power reader antenna
`
`
`
`
`
`100
`
`5
`
`0.33Tari
`
`0.33Tari
`
`25
`
`2:1
`
`82.3
`
`0.525Tari
`
`
`
`
`
`%
`
`%
`
`sec
`
`sec
`
`µs
`
`
`
`%
`
`µs
`
`Double and single sideband amplitude shift
`keying;
`phase-reversal amplitude shift keying
`
`Pulse-interval encoding
`
`(A-B)/A, A=envelope max., B=envelope min.
`
`Portion of A-B
`
`
`
`
`
`Data 0 symbol period
`
`Data 1 symbol duration relative to Data 0
`
`Ratio of data symbol high time to total
`symbol time
`
`Pulse width defined as the low modulation
`time (50% amplitude)
`
`© 2017, Impinj, Inc. // Version 5.0
`
`11
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`3.4 Tag-to-Reader (Reverse Link) Signal Characteristics
`Table 3-10 Reverse Link Signal Parameters
`
`PARAMETER
`
`MINIMUM
`
`TYPICAL MAXIMUM
`
`UNITS
`
`COMMENTS
`
`Modulation Characteristics
`
`Modulation
`
`Data Encoding
`
`Change in Modulator
`Reflection Coefficient
` due to Modulation
`
`Duty Cycle
`
`Symbol Period1
`
`Miller Subcarrier
`Frequency1
`
`
`
`
`
`
`
`45
`
`1.5625
`
`3.125
`
`40
`
`
`
`ASK
`
`Baseband
`FM0 or
`Miller
`Subcarrier
`
`0.8
`
`50
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`55
`
`25
`
`200
`
`640
`
`
`
`
`
`
`
`
`
`%
`
`µs
`
`µs
`
`kHz
`
`
`
`FET Modulator
`
`
`
`reflect - absorb| (per read/write
`sensitivity, Table 3-91)
`
`
`
`Baseband FM0
`
`Miller-modulated subcarrier
`
`
`
`Note: Values are nominal minimum and nominal maximum, and do not include frequency tolerance. Apply appropriate
`frequency tolerance to derive absolute periods and frequencies.
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`12
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`4 TAG MEMORY
`4.1 Monza R6 Tag Chip Memory Map
`Table 4-11 Physical/Logical Memory Map
`
`MEMORY
`BANK
`NUMBER
`
`MEMORY
`BANK NAME
`
`MEMORY
`BANK BIT
`ADDRESS
`
`50h-5Fh
`
`40h-4Fh
`
`30h-3Fh
`
`20h-2Fh
`
`102
`
`
`
`TID
`(ROM)
`
`
`
`15 14
`
`13
`
`12 11
`
`10
`
`9
`
`8
`
`7
`
`6
`
`5
`
`4
`
`3
`
`2
`
`1
`
`0
`
`BIT NUMBER
`
`TID_Serial[15:0]
`
`TID_Serial[31:16]
`
`TID_Serial[47:32]
`
`Extended TID Header
`
`10h-1Fh
`
`Manufacturer ID
`
`Model Number
`
`00h-0Fh
`
`1
`
`1
`
`1
`
`0
`
`0
`
`0
`
`1
`
`0
`
`Manufacturer ID
`
`012
`
`EPC
`(NVM)
`
`70h-7Fh
`
`60h-6Fh
`
`50h-5Fh
`
`40h-4Fh
`
`30h-3Fh
`
`20h-2Fh
`
`10h-1Fh
`
`00h-0Fh
`
`E0h-EFh
`
`EPC[15:0]
`
`EPC[31:16]
`
`EPC[47:32]
`
`EPC[63:48]
`
`EPC[79:64]
`
`EPC[95:80]
`
`Protocol-Control Bits (PC)
`
`CRC-16
`
`RFU[12:0]=000h
`
`ATV[2:0]
`
`50h-5Fh
`
`A
`
`Factory Calibration B [14:0]
`
`002
`
`RESERVED
`(NVM)
`
`40h-4Fh
`
`30h-3Fh
`
`20h-2Fh
`
`10h-1Fh
`
`00h-0Fh
`
`Factory Calibration A [15:0]
`
`Access Password[15:0]=0000h
`
`Access Password[31:16]=0000h
`
`Kill Password[15:0]=0000h
`
`Kill Password[31:16]=0000h
`
`© 2017, Impinj, Inc. // Version 5.0
`
`13
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`4.2 Memory Banks
`Described in the following sections are the contents of the NVM and ROM memory, and the parameters for their
`associated bit settings.
`
`4.2.1 Reserved Memory
`Reserved Memory contains the Access and Kill passwords which are programmed to zero. It also contains the
`AutoTune disable bit, marked A in the memory map, and the AutoTune value, marked ATV[2:0] in word 0xE. The
`AutoTune value represents the tuning capacitance scale, from zero to four. When the AutoTune disable bit is zero
`AutoTune works as normal. When the bit is one, AutoTune is disabled and the capacitance on the front end
`assumes the mid-range value.
`
`Access Password
`4.2.1.1
`The Access Password is a 32-bit value stored in Reserved Memory 20h to 3F h MSB first. Monza R6 does not
`implement an Access Password and acts as though it has a zero-valued Access Password that is permanently
`read/write locked.
`
`Kill Password
`4.2.1.2
`The Kill Password is a 32-bit value stored in Reserve Memory 00 h to 1F h, MSB first. Monza R6 does not
`implement a Kill Password and acts as though it has a zero-valued Kill Password that is permanently read/write
`locked.
`
`PermaLock
`4.2.1.3
`To permalock all of the memory a lock command must be sent with a payload of all ones, FFFFFh.
`
`AutoTune Disable and AutoTune Value
`4.2.1.4
`The AutoTune disable bit is the first bit in word 05h, marked A in the memory map, and the AutoTune value,
`marked ATV[2:0] in word 0Eh. The factory programmed value of the AutoTune disable bit is zero. The AutoTune
`value represents the tuning capacitance scale, from zero to four. A value of zero removes 100 fF of capacitance
`across the RF input of the tag and a value of four adds 100 fF across the RF input of the chip. See Table 4-12 for
`the mapping between AutoTune value and the change in input capacitance. A reader acquires the AutoTune
`value by issuing a single word Read command to word 0Eh in the reserved memory bank. The AutoTune value is
`not writable.
`
`To disable AutoTune a reader issues a Write command or a single word BlockWrite command to word 05h. Only
`the AutoTune disable bit will change and the rest of bits in the payload will be ignored. If the tag’s memory is
`locked then the AutoTune disable bit will also be locked.
`
`When the AutoTune disable bit is zero AutoTune works as normal and when the bit is one AutoTune is overridden
`and the capacitance across the RF input is set to 0 fF. When AutoTune is disabled, the readout of AutoTune
`value does not represent the value of capacitance across the RF input to the tag.
`
`
`
`© 2017, Impinj, Inc. // Version 5.0
`
`14
`
`
`
`NXP EX 1009
`NXP v. Impinj
`
`

`

`Impinj Monza R6 Tag Chip Datasheet
`
`
`Table 4-12 AutoTune Value
`
`AUTOTUNE VALUE
`
`CHANGE IN INPUT
`CAPACITANCE (FF)
`
`0h
`
`1h
`
`2h
`
`3h
`
`4h
`
`-100
`
`-40
`
`0
`
`+40
`
`+100
`
`
`
`4.3 Logical vs. Physical Bit Identification
`For the purposes of distinguishing most significant from least significant bits, a logical representation is used in
`this datasheet where MSBs correspond to large bit numbers and LSBs to small bit numbers. For example, Bit 15
`is the logical MSB of a memory row in the memory map. Bit 0 is the LSB. A multi-bit word represented by
`WORD[N:0] is interpreted as MSB first when read from left to right. This convention should not be confused with
`the physical bit address indicated by the rows and column addresses in the memory map; the physical bit address
`describes the addressing used to access the memory.
`
`4.3.1 EPC Memory (EPC Data, Protocol Control Bits, and CRC16)
`As per the Gen2 specification, EPC memory contains a 16-bit cyclic-redundancy check word (CRC16) at memory
`addresses 00h to 0Fh, the 16 protocol-control bits (PC) at memory addresses 10h to 1Fh, and an EPC value
`beginning at address 20h.
`
`The protocol control fields include a five-bit EPC length, a one-bit user-memory indicator (UMI = 0), a one-bit
`extended protocol control indicator, and a nine-bit numbering system identifier (NSI). The factory-p