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Inventors

Huang-Yu Chen Yuan-Te Hou Yu-Hsiang Kao Ken-Hsien Hsieh Ru-Gun Liu Lee-Chung Lu

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Taiwan Semiconductor Manufacturing Company, Ltd.

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Layout Optimization For Integrated Circuit Design

61/794,037 | U.S. Patent Application Cite Docket

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Filed March 15, 2013

Case Type Provisional

Status Provisional Application Expired

Last Updated: 3 days, 8 hours ago

Date	#	Transaction
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61/794,037 | U.S. Patent Application Cite Docket

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