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OVERSIZED CONTACTS AND VIAS IN SEMICONDUCTOR CHIP DEFINED BY LINEARLY CONSTRAINED TOPOLOGY

12/466,341 | U.S. Patent Application

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Location ELECTRONIC
Filed May 14, 2009
Examiner QUOC DINH HOANG
Class 257
Art Group 2892
Patent No. 8,247,846
Case Type Utility - 257/211000
Status Patented Case
Parent 61/127,727 Expired
Parent 12/13,342 Patented
Parent 60/963,364 Expired
Parent 60/972,394 Expired
Parent 12/212,562 Patented
Parent 11/683,402 Patented
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Last Updated: 6 years, 4 months ago
Date # Transaction