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SEMICONDUCTOR DEVICE WITH LINEARLY RESTRICTED GATE LEVEL REGION INCLUDING TWO TRANSISTORS OF FIRST TYPE AND TWO TRANSISTORS OF SECOND TYPE WITH OFFSET GATE CONTACTS

12/563,076 | U.S. Patent Application

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Location ELECTRONIC
Filed Sept. 18, 2009
Examiner QUOC DINH HOANG
Class 257
Art Group 2892
Patent No. 8,258,547
Case Type Utility - 257/206000
Status Patented Case
Parent 12/212,562 Patented
Parent 11/683,402 Patented
Parent 60/781,288 Expired
Last Updated: 5 years, 11 months ago
Date # Transaction