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COMPUTER SYSTEM INCLUDING CPU OR PERIPHERAL BRIDGE TO COMMUNICATE SERIAL BITS OF PERIPHERAL COMPONENT INTERCONNECT BUS TRANSACTION AND LOW VOLTAGE DIFFERENTIAL SIGNAL CHANNEL TO CONVEY THE SERIAL BITS

13/560,924 | U.S. Patent Application

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Location ELECTRONIC
Filed July 27, 2012
Examiner RAYMOND NGAN PHAN
Class 710
Art Group 2111
Patent No. 8,626,977
Case Type Utility - 710/313000
Status Patented Case
Parent 13/87,912 Patented
Parent 12/504,534 Patented
Parent 12/77,503 Patented
Parent 11/166,656 Patented
Parent 11/97,694 Patented
Parent 10/772,214 Patented
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Last Updated: 4 years, 9 months ago
Date # Transaction