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SEMICONDUCTOR CHIP INCLUDING DIGITAL LOGIC CIRCUIT INCLUDING AT LEAST NINE LINEAR-SHAPED CONDUCTIVE STRUCTURES COLLECTIVELY FORMING GATE ELECTRODES OF AT LEAST SIX TRANSISTORS WITH SOME TRANSISTORS FORMING CROSS-COUPLED TRANSISTOR CONFIGURATION AND ASSOCIATED METHO

14/476,511 | U.S. Patent Application

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Location ELECTRONIC
Filed Sept. 3, 2014
Examiner EVAN T PERT
Class 257
Art Group 2826
Patent No. 9,245,081
Case Type Utility - 257/041000
Status Patented Case
Parent 13/741,305 Patented
Parent 12/753,798 Patented
Parent 12/402,465 Patented
Parent 61/36,460 Expired
Parent 61/42,709 Expired
Parent 61/45,953 Expired
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Last Updated: 6 years ago
Date # Transaction