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Thomas E. Harrington, III

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D3 Semiconductor LLC

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D3 SEMICONDUCTOR LLC

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DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICAL SEMICONDUCTOR DEVICES

14/816,911 | U.S. Patent Application

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Location ELECTRONIC

Filed Aug. 3, 2015

Examiner WALTER H SWANSON

Class 257

Art Group 2823

Patent No. 9,589,889

Case Type Utility - 257/139000

Status Patented Case

Parent 14/91,315 Patented

Parent 61/729,720 Expired

Child 15/451,074 Patented

Last Updated: 4 years, 9 months ago

Date	#	Transaction
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DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICAL SEMICONDUCTOR DEVICES

14/816,911 | U.S. Patent Application

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