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Thomas E. Harrington, III

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D3 Semiconductor LLC

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D3 SEMICONDUCTOR LLC

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DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICAL SEMICONDUCTOR DEVICES

15/451,074 | U.S. Patent Application

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Location ELECTRONIC

Filed March 6, 2017

Examiner WALTER H SWANSON

Class 257

Art Group 2823

Patent No. 9,997,455

Case Type Utility - 257/139000

Status Patented Case

Parent 14/816,911 Patented

Parent 14/91,315 Patented

Parent 61/729,720 Expired

Last Updated: 4 years, 1 month ago

Date	#	Transaction
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DEVICE ARCHITECTURE AND METHOD FOR PRECISION ENHANCEMENT OF VERTICAL SEMICONDUCTOR DEVICES

15/451,074 | U.S. Patent Application

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