www.uspto.gov
`
`UNITED STATES DEPARTMENT OF COMMERCE
`United States Patent and Trademark Office
`Address: COMMISSIONER FOR PATENTS
`P.O. Box 1450
`Alexandria, Virginia 22313-1450
`
`17/616, 193
`
`12/03/2021
`
`Kenji KONDO
`
`17253US01
`
`1036
`
`Xsensts
`
`/Sony
`
`nna
`
`Xsensus / Sony
`100 Daingerfield Road, Suite 402
`Alexandria, VA 22314
`
`PHILIPPE, GIMS $
`
`PAPER NUMBER
`
`ART UNIT
`
`2424
`
`NOTIFICATION DATE
`
`DELIVERY MODE
`
`01/06/2025
`
`ELECTRONIC
`
`Please find below and/or attached an Office communication concerning this application or proceeding.
`
`The time period for reply, if any, is set in the attached communication.
`
`Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
`following e-mail address(es):
`Xdocket @ XSensus.com
`
`Xsensuspat@ XSensus.com
`anaquadocketing @ Xsensus.com
`
`PTOL-90A (Rev. 04/07)
`
`

`

`Application No.
`Applicant(s)
`171616, 193
`KONDO, Kenji
`
`Office Action Summary Art Unit|AIA (FITF)StatusExaminer
`GIMS $ PHILIPPE
`2424
`Yes
`
`
`
`-- The MAILING DATEof this communication appears on the cover sheet with the correspondence address --
`Period for Reply
`
`A SHORTENED STATUTORYPERIOD FOR REPLYIS SET TO EXPIRE 3 MONTHS FROM THE MAILING
`DATE OF THIS COMMUNICATION.
`Extensionsof time may be available underthe provisions of 37 CFR 1.136(a). In no event, however, may a reply betimely filed after SIX (6) MONTHSfrom the mailing
`date of this communication.
`If NO period for reply is specified above, the maximum statutory period will apply and will expire SIX (6) MONTHSfrom the mailing date of this communication.
`-
`- Failure to reply within the set or extended period for reply will, by statute, cause the application to become ABANDONED (35 U.S.C. § 133).
`Any reply received by the Office later than three months after the mailing date of this communication, evenif timely filed, may reduce any earned patent term
`adjustment. See 37 CFR 1.704(b).
`
`Status
`
`
`
`1) Responsive to communication(s) filed on 02 October 2024.
`C) A declaration(s)/affidavit(s) under 37 CFR 1.130(b) was/werefiled on
`2a)[¥) This action is FINAL.
`2b) (J This action is non-final.
`3) An election was madeby the applicant in responseto a restriction requirement set forth during the interview
`on
`; the restriction requirement and election have been incorporated into this action.
`4)(2) Since this application is in condition for allowance except for formal matters, prosecution as to the merits is
`closed in accordance with the practice under Exparte Quayle, 1935 C.D. 11, 453 O.G. 213.
`
`Disposition of Claims*
`1,5-6,8,10,12,14-15 and 17-20 is/are pending in the application.
`)
`Claim(s)
`5a) Of the above claim(s) _ is/are withdrawn from consideration.
`CL] Claim(s)__is/are allowed.
`Claim(s) 1,5-6,8,10,12,14-15 and 17-20 is/are rejected.
`(] Claim(s)__ is/are objectedto.
`C] Claim(s
`are subjectto restriction and/or election requirement
`)
`* If any claims have been determined allowable, you maybeeligible to benefit from the Patent Prosecution Highway program at a
`participating intellectual property office for the corresponding application. For more information, please see
`http://www.uspto.gov/patents/init_events/pph/index.jsp or send an inquiry to PPHfeedback@uspto.gov.
`
`) ) ) )
`
`Application Papers
`10) The specification is objected to by the Examiner.
`11)0) The drawing(s) filedon__ is/are: a)(J accepted or b)( objected to by the Examiner.
`Applicant may not request that any objection to the drawing(s) be held in abeyance. See 37 CFR 1.85(a).
`Replacement drawing sheet(s) including the correction is required if the drawing(s) is objected to. See 37 CFR 1.121(d).
`
`Priority under 35 U.S.C. § 119
`12)7) Acknowledgment is made of a claim for foreign priority under 35 U.S.C. § 119(a)-(d)or (f).
`Certified copies:
`c)Z None ofthe:
`b)() Some**
`a)C All
`1.1.) Certified copies of the priority documents have been received.
`2.2) Certified copies of the priority documents have been received in Application No.
`3.1.) Copies of the certified copies of the priority documents have been receivedin this National Stage
`application from the International Bureau (PCT Rule 17.2(a)).
`*“ See the attached detailed Office action for a list of the certified copies not received.
`
`Attachment(s)
`
`1) [[] Notice of References Cited (PTO-892)
`
`2) (J Information Disclosure Statement(s) (PTO/SB/08a and/or PTO/SB/08b)
`Paper No(s)/Mail Date
`U.S. Patent and Trademark Office
`
`3)
`
`4)
`
`(LJ Interview Summary (PTO-413)
`Paper No(s)/Mail Date
`(Qj Other:
`
`PTOL-326 (Rev. 11-13)
`
`Office Action Summary
`
`Part of Paper No./Mail Date 20241231
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 2
`
`DETAILED ACTION
`
`1.
`
`Applicant’s amendmentfiled on October 2.4 2024 has been fully considered and entered, but
`
`the arguments are not deemed to be persuasive.
`
`The present application,filed on or after March 16, 2013, is being examined under thefirst inventor to
`
`Notice of Pre-AlA orAIA Status
`
`file provisions of the AIA.
`
`REMARKS
`
`The Applicant amended the claimsin order to add the limitations “wherein the down-sampled pixel is a
`
`pixel obtained by averaging the original pixel.” The prior art of record, Cho et al. (US 2013/0141595),
`
`teaches the newly added limitation. The Examiner will provide the rejection below while corelating the
`
`newly added limitations.
`
`Claim Rejections - 35 USC § 103
`
`2.
`
`Inthe event the determination of the status of the application as subject to AIA 35 U.S.C. 102
`
`and 103 (or as subject to pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory
`
`basis (i.e., changing from AIA to pre-AlA) for the rejection will not be considered a new ground of
`
`rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same
`
`under either status.
`
`3.
`
`The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections
`
`set forth in this Office action:
`
`A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is
`not identically disclosed as set forthin section 102, if the differences between the claimed invention
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 3
`
`and the prior art are such that the claimed invention as a whole would have been obvious before the
`effective filing date of the claimed invention to a person having ordinary skill in the art to which the
`claimed invention pertains. Patentability shall not be negated by the manner in which the invention
`was made.
`
`4.
`
`Claims 1, 5-6, 8,10, 12,14, 15, 17-20 are rejected under 35 U.S.C. 103 as being unpatentable
`
`over Li et al. (US Patent Application Publication no. 2022/0182616) in view of CHOetal. (US Patent
`
`Application Publication no. 2013/0141595).
`
`Regarding claim 1, Li discloses an image processing device, comprising: circuitry configured to generate a
`
`predicted image of a current prediction block by performing interpolation processing using an original
`
`pixel of a reference imageasa left adjacent pixel adjacent to a left of the predicted image of the current
`
`prediction block to be encoded, when performing intra prediction using a matrix operation (See Li
`
`[0118] “ (i) a prediction sample may be derived based on average or interpolation of neighboring
`
`reference samples of the current block and(ii) the prediction sample may be derived based on a reference
`
`sample present in a specific (prediction) direction with respect to the prediction sample among the
`
`neighboring reference samples of the current block...” “The above-described intra prediction methods
`
`may be referred to as intra prediction type to be distinguishedfrom the intra prediction mode. In
`
`addition, after a prediction signalfor a sub-sampled pixel set of the current block is generated using
`
`reconstructed neighboring pixels located on the left and top of the current block, the generatedprediction
`
`signal and the neighboring sample value may be interpolated in the vertical and horizontal direction to
`
`generate the prediction signal having an original size, thereby applying matrix-weightedintra prediction
`
`(MIP) forperforming intra prediction of the current block.” ; and an encoder configured to encode the
`
`current prediction block using the predicted image generated by the circuitry (See Li [0020], [0024] and
`
`[0385]).
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 4
`
`Itis noted that Li is silent the circuitry is configured to select whether to use the original pixel of
`
`the reference image or whether to usea down-sampledpixel as the left adjacent pixel adjacent to the
`
`left of the predicted image of the current prediction block, according to a prediction mode of
`
`the intra prediction in the interpolation processing; wherein the down-sampled pixel is a pixel obtained
`
`by averaging the original pixel, and an encoder configured to encode the current prediction block using
`
`the predicted image generated by the circuitry.
`
`However, CHO teaches an image processing device comprising a circuitry is configured to select
`
`whether to use theoriginal pixel of the reference image or whether touse a down-sampled pixel as the
`
`left adjacent pixel adjacent to the left of the predicted image of the current prediction block, according
`
`toa prediction mode of the intra prediction in the interpolation processing; wherein the down-sampled
`
`pixel is a pixel obtained by averaging the original pixel (See CHO [0035], “Then deadpixel candidates are
`
`selectedfrom the downsampling set 410a by using the moving average of the sample pixel 420a, as
`
`shownin step 430. In step 430, whether the sample pixel is a dead pixel candidate is determined
`
`according to the relationship of moving average of the sample pixel 420a andits original pixel value in
`
`the downsampling set 410a.”, [0037] and [0039]),and an encoder configured to encode the current
`
`prediction block using the predicted image generatedby the circuitry (See CHO [0012]-[0013] for down-
`
`sampledpixels and utilizing the original pixel, [0042] for the interpolation, [0046] for the
`
`neighboring/adjacent pixels and prediction detect and [0055)).
`
`Therefore,it is considered obvious that one skilled in the art, before the effective filing date of
`
`the claimed invention, would recognize the advantage of modifying Li to incorporate CHO’s teachings
`
`wherein an imageprocessing device comprising a circuitry is configured to select whether to use the
`
`original pixel of the reference image or whether to use a down-sampledpixel as the left adjacent pixel
`
`adjacent to the left of the predicted image of the current prediction block, according to a prediction
`
`mode of the intra prediction in the interpolation processing; wherein the down-sampledpixel is a pixel
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page5S
`
`obtained by averaging the original pixel, and an encoder configured to encode the current prediction
`
`block using the predicted image generated by the circuitry. The motivation for performing sucha
`
`modification in Li is to detect unnecessary pixels in the reference image.
`
`As per claim 18, Li discloses an image processing method, comprising: an intra prediction process of
`
`generating a predicted image of a current prediction block by performing interpolation processing using
`
`an original pixel of a reference imageas a left adjacent pixel adjacent to a left of the predicted image of
`
`the current prediction block to be encoded when performing an intra prediction using a matrix
`
`operation (See Li [0118] “(i) a prediction sample may be derived based on average or interpolation of
`
`neighboring reference samples of the current block and(ii) the prediction sample may be derived based
`
`ona reference sample present in a specific (prediction) direction with respect to the prediction sample
`2? ¢
`
`among the neighboring reference samples of the current block...”
`
`“The above-described intra prediction
`
`methods may be referred to as intra prediction type to be distinguishedfrom the intra prediction mode. In
`
`addition, after a prediction signalfor a sub-sampled pixel set of the current block is generated using
`
`reconstructed neighboring pixels located on the left and top of the current block, the generatedprediction
`
`signal and the neighboring sample value may be interpolated in the vertical and horizontaldirection to
`
`generate the prediction signal having an originalsize, thereby applying matrix-weightedintra prediction
`
`(MIP) forperforming intra prediction ofthe current block.” ; and an encoding process of encoding the
`
`current prediction block using the predicted image generatedin the intra prediction process (SeLi
`
`[0020], [0024]).
`
`Itis noted that Li is silent the circuitry is configured to select whether to use the original pixel of
`
`the reference image or whether to usea down-sampledpixel as the left adjacent pixel adjacent to the
`
`left of the predicted image of the current prediction block, according to a prediction mode of
`
`the intra prediction in the interpolation processing; and anencoder configured to encode the current
`
`prediction block using the predicted image generated by the circuitry.
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 6
`
`However, CHO teaches an image processing device comprising a circuitry is configured to select
`
`whether to use theoriginal pixel of the reference image or whether touse a down-sampled pixel as the
`
`left adjacent pixel adjacent to the left of the predicted image of the current prediction block, according
`
`toa prediction mode of the intra prediction in the interpolation processing; and an encoder configured
`
`to encode the current prediction block using the predicted image generated by thecircuitry (See CHO
`
`[0012]-[0013] for down-sampledpixels and utilizing the original pixel, [0042] for the interpolation,
`
`[0046] for the neighboring/adjacentpixels and prediction detect and [0055]).
`
`Therefore,it is considered obvious that one skilled in the art, before the effective filing date of
`
`the claimed invention, would recognize the advantage of modifying Li to incorporate CHO’s teachings
`
`wherein an imageprocessing device comprising a circuitry is configured to select whether to use the
`
`original pixel of the reference image or whether to use a down-sampledpixel as the left adjacent pixel
`
`adjacent to the left of the predicted image of the current prediction block, according to a prediction
`
`mode of the intra prediction in the interpolation processing; and an encoder configured to encode the
`
`current prediction block using the predicted image generatedby the circuitry. The motivation for
`
`performing such a modification in Li is to detect unnecessary pixels in the reference image.
`
`As per claim 19, Li discloses an image processing device, comprising: circuitry configured to generatea
`
`predicted image of a current prediction block by performing interpolation processing using an original
`
`pixel of a reference imageasa left adjacent pixel adjacent to a left of the predicted image of the current
`
`prediction block to be decoded when performing an intra prediction using a matrix operation (See Li
`
`[0118] “(i) a prediction sample may be derived based on averageorinterpolation of neighboring
`
`reference samples of the current block and(ii) the prediction sample may be derived based on a
`
`reference sample present in a specific (prediction) direction with respect to the predictionsample among
`
`the neighboring reference samplesof the currentblock...” “The above-described intra prediction methods
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 7
`
`may be referred toas intra prediction type to be distinguished from the intra prediction mode. In
`
`addition, after a prediction signal for a sub-sampled pixel set of the current block is generated using
`
`reconstructed neighboring pixels located on the left and top of the current block, the generated
`
`prediction signal and the neighboring sample value may be interpolated in the vertical and horizontal
`
`direction to generate the prediction signal having an original size, thereby applying matrix-weighted
`
`intra prediction (MIP) for performing intra prediction of the current block.” and adecoder configured to
`
`decode the current prediction block using the predicted image generated by the circuitry (See Li [077],
`
`[0020], [0099], [0116)).
`
`Itis noted that Li is silent the circuitry is configured to select whether to use the original pixel of
`
`the reference image or whether to usea down-sampledpixel as the left adjacent pixel adjacent to the
`
`left of the predicted image of the current prediction block, according to a prediction mode of
`
`the intra prediction in the interpolation processing; and anencoder configured to encode the current
`
`prediction block using the predicted image generated by the circuitry.
`
`However, CHO teaches an image processing device comprising a circuitry is configured to select
`
`whether to use the original pixel of the reference image or whether touse a down-sampled pixel as the
`
`left adjacent pixel adjacent to the left of the predicted image of the current prediction block, according
`
`toa prediction mode of the intra prediction in the interpolation processing; and an encoder configured
`
`to encode the current prediction block using the predicted image generated by thecircuitry (See CHO
`
`[0012]-[0013] for down-sampledpixels and utilizing the original pixel, [0042] for the interpolation,
`
`[0046] for the neighboring/adjacentpixels and prediction detect and [0055]).
`
`Therefore,it is considered obvious that one skilled in the art, before the effective filing date of
`
`the claimed invention, would recognize the advantage of modifying Li to incorporate CHO’s teachings
`
`wherein an imageprocessing device comprising a circuitry is configured to select whether to use the
`
`original pixel of the reference image or whether to use a down-sampledpixel as the left adjacent pixel
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 8
`
`adjacent to the left of the predicted image of the current prediction block, according to a prediction
`
`mode of the intra prediction in the interpolation processing; and an encoder configured to encode the
`
`current prediction block using the predicted image generated by the circuitry. The motivation for
`
`performing such a modification in Li is to detect unnecessary pixels in the reference image.
`
`As per claim 20, Li discloses an image processing method, comprising: an intra prediction process of
`
`generating a predicted image of acurrent prediction block by performing interpolation processing using
`
`an original pixel of a reference imageas a left adjacent pixel adjacent to a left of the predicted image of
`
`the current prediction block to be decoded, when performing intra prediction using a matrix operation
`
`(See Li [0118] “G) a@ prediction sample may be derived based on average or interpolation of neighboring
`
`reference samples of the current block and(ii) the prediction sample may be derived based on a reference
`
`sample present in a specific (prediction) direction with respect to the prediction sample among the
`2? ¢
`
`neighboring reference samples of the current block...”
`
`“The above-described intra prediction methods
`
`may be referred to as intra prediction type to be distinguishedfrom the intra prediction mode. In
`
`addition, after a prediction signalfor a sub-sampled pixel set of the current block is generated using
`
`reconstructed neighboring pixels located on the left and top of the current block, the generatedprediction
`
`signal and the neighboring sample value may be interpolated in the vertical and horizontaldirection to
`
`generate the prediction signal having an originalsize, thereby applying matrix-weightedintra prediction
`
`(MIP) forperforming intra prediction of the current block. ’; and a decoding process of decoding the
`
`current prediction block using the predicted image generatedin the intra prediction process (SeeLi
`
`[0077], [0099], [0116)).
`
`Itis noted that Li is silent the circuitry is configured to select whether to use the original pixel of
`
`the reference image or whether to usea down-sampledpixel as the left adjacent pixel adjacent to the
`
`left of the predicted image of the current prediction block, according to a prediction mode of
`
`the intra prediction in the interpolation processing; and anencoder configured to encode the current
`
`prediction block using the predicted image generated by the circuitry.
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 9
`
`However, CHOteaches an image processing device comprising a circuitry is configured to select
`
`whether to use theoriginal pixel of the reference image or whether touse a down-sampled pixel as the
`
`left adjacent pixel adjacent to the left of the predicted image of the current prediction block, according
`
`toa prediction mode of the intra prediction in the interpolation processing; and an encoder configured
`
`to encode the current prediction block using the predicted image generated by thecircuitry (See CHO
`
`[0012]-[0013] for down-sampledpixels and utilizing the original pixel, [0042] for the interpolation,
`
`[0046] for the neighboring/adjacentpixels and prediction detect and [0055]).
`
`Therefore,it is considered obvious that one skilled in the art, before the effective filing date of
`
`the claimed invention, would recognize the advantageof madifying Li to incorporate CHO’s teachings
`
`wherein an imageprocessing device comprising a circuitry is configured to select whether to use the
`
`original pixel of the reference image or whether to use a down-sampledpixel as the left adjacent pixel
`
`adjacent to the left of the predicted image of the current prediction block, according to a prediction
`
`mode of the intra prediction in the interpolation processing; and an encoder configured to encode the
`
`current prediction block using the predicted image generated by the circuitry. The motivation for
`
`performing such a modification in Li is to detect unnecessary pixels in the reference image.
`
`As per claim 5, the combination of Li and CHO further teaches wherein the prediction mode of the intra
`
`prediction includes information indicating a prediction direction of the intra prediction (See Li [0084]).
`
`As per claim 6, the combination of Li and CHO further teaches wherein the prediction mode of the intra
`
`prediction includes information indicating a block size of the current prediction block (See Li [0015] and
`
`[0116]).
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 10
`
`As per claims 8, 10, and 12, the combination of Liand CHO further teaches wherein the circuitry selects
`
`whether to use theoriginal pixel of the reference image or whether touse the down-sampledpixel as an
`
`adjacent pixel adjacent to the predicted image of the current prediction block when the prediction
`
`mode of the intra prediction includes information indicating directional prediction (See the rejection of
`
`claim 1, [0042], [0046] and [0055)).
`
`As per claim 14, the combination of Li and CHO further teaches wherein the circuitry selects whether to
`
`use the original pixel of the reference image or whether to use the down-sampled pixel as the left
`
`adjacent pixel adjacent to the left of the predicted image of the current prediction block, depending on
`
`whether an in-loopfilter is applied to the locally decoded image (See Li [0095] and decoder [0129]).
`
`As per claims 15 and 17, the combination of Liand CHO further teaches wherein the identification data
`
`is data for identifying whether to use the original pixel of the reference image or whether to use the
`
`down-sampled pixel as the left adjacent pixel (See CHO [0047]-[0048)).
`
`5.
`
`THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth
`
`in 37 CFR 1.136(a).
`
`A shortenedstatutory period for reply to this final action is set to expire THREE MONTHS from
`
`the mailing date of this action.
`
`In the event a first reply is filed within TWO MONTHS ofthe mailing date
`
`of this final action and the advisory action is not mailed until after the end of the THREE-MONTH
`
`shortened statutory period, then the shortened statutory period will expire on the date the advisory
`
`action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing
`
`date of the advisory action.
`
`In no event, however, will the statutory period for reply expire later than
`
`SIX MONTHS from the mailing date of this final action.
`
`

`

`Application/Control Number: 17/616,193
`Art Unit: 2424
`
`Page 11
`
`6.
`
`Anyinquiry concerning this communication or earlier communications from the examiner
`
`should be directed to GIMS S PHILIPPE whose telephone number is (571)272-7336. The examiner can
`
`normally be reached Maxi Flex.
`
`Examiner interviews are available via telephone, in-person, and video conferencing using a
`
`USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use
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`the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
`
`If attempts to reachthe examiner by telephone are unsuccessful, the examiner’s supervisor,
`
`Jefferey F Harold can be reached on 571-272-7519. The fax phone number for the organization where
`
`this application or proceeding is assigned is 571-273-8300.
`
`Information regarding the status of published or unpublished applications may be obtained from
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`Patent Center. Unpublished application information in Patent Center is available to registered users. To
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`file and managepatent submissions in Patent Center,visit: https://patentcenter.us pto. gov.Visit
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`https ://www.us pto.gov/patents/apply/patent-center for more information about Patent Center and
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`https ://www.uspto.gov/patents/docx for information aboutfiling in DOCX format. For additional
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`571-272-1000.
`
`/GIMSS$PHILIPPE/
`Primary Examiner, Art Unit 2424
`
`