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Displaying 204-218 of
819 results
PROCESS FOR INCREASING THE ETCH RESISTANCE AND FOR REDUCING THE...
Docket
10/375,532,
U.S. Patent Application
(Feb. 27, 2003)
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Cite Docket
INTEGRATED MEMORY AND METHOD FOR OPERATING AN INTEGRATED MEMO...
Docket
10/368,081,
U.S. Patent Application
(Feb. 18, 2003)
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Cite Docket
METHOD AND DEVICE FOR DEPOSITING THIN LAYERS VIA ALD/CVD PROCESS...
Docket
10/375,529,
U.S. Patent Application
(Feb. 27, 2003)
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DIGITAL MEMORY CIRCUIT HAVING A PLURALITY OF MEMORY BANKS
Docket
10/342,901,
U.S. Patent Application
(Jan. 15, 2003)
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METHOD OF PATTERNING FERROELECTRIC LAYERS
Docket
10/364,819,
U.S. Patent Application
(Feb. 11, 2003)
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METHOD AND LOGIC/MEMORY MODULE FOR CORRECTING THE DUTY CYCLE ...
Docket
10/340,046,
U.S. Patent Application
(Jan. 10, 2003)
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RESIST FOR FORMING A STRUCTURE FOR ALIGNING AN ELECTRON OR ION B...
Docket
10/340,987,
U.S. Patent Application
(Jan. 13, 2003)
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MEMORY MODULE WITH IMPROVED ELECTRICAL PROPERTIES
Docket
10/360,456,
U.S. Patent Application
(Feb. 6, 2003)
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INTEGRATED CIRCUIT WITH TEMPERATURE SENSOR AND METHOD FOR HEAT...
Docket
10/352,824,
U.S. Patent Application
(Jan. 28, 2003)
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METHOD FOR GENERATING TEST SIGNALS FOR AN INTEGRATED CIRCUIT AND...
Docket
10/368,330,
U.S. Patent Application
(Feb. 18, 2003)
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MAGNETORESISTIVE MEMORY CELL WITH POLARITY-DEPENDENT RESISTAN...
Docket
10/352,730,
U.S. Patent Application
(Jan. 27, 2003)
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INTEGRATED CIRCUIT AND METHOD FOR OPERATING THE INTEGRATED CIRCU...
Docket
10/340,989,
U.S. Patent Application
(Jan. 13, 2003)
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PROCESS FACILITY HAVING AT LEAST TWO PHYSICAL UNITS EACH HAVING A...
Docket
10/330,444,
U.S. Patent Application
(Dec. 27, 2002)
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REFLECTION MASK FOR EUV-LITHOGRAPHY AND METHOD FOR FABRICATING...
Docket
10/292,866,
U.S. Patent Application
(Nov. 12, 2002)
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