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Displaying 9-23 of 819 results

1-18-US-106205700KP1

Document PVD METHOD AND PVD APPARATUS, 10/620,570, No. 1-18-US-106205700KP1 (U.S. Pat. App. Jul. 26, 2017)

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1-15-US-101877630IP1

Document ELECTRONIC PRINTED CIRCUIT BOARD HAVING A PLURALITY OF IDENTICALLY DESIGNED, HOUSING-ENCAPSULATED SEMICONDUCTOR MEMORIES, 10/187,763, No. 1-15-US-101877...

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1-18-US-106402300HP1

Document PHASE DETECTOR, 10/640,230, No. 1-18-US-106402300HP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-1062383109P1

Document CIRCUIT AND METHOD FOR WRITING AND READING DATA FROM A DYNAMIC MEMORY CIRCUIT, 10/623,831, No. 1-18-US-1062383109P1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106102410FP1

Document CONNECTOR FOR A PLURALITY OF SWITCHING ASSEMBLIES WITH COMPATIBLE INTERFACES, 10/610,241, No. 1-18-US-106102410FP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106200920DP1

Document CIRCUIT ELEMENT WITH TIMING CONTROL, 10/620,092, No. 1-18-US-106200920DP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106094530RP1

Document POLY-O-HYDROXYAMIDE, POLYBENZOXAZOLE FROM THE POLY-O-HYDROXYAMIDE, ELECTRONIC COMPONENT INCLUDING A POLYBENZOXAZOLE, AND PROCESSES FOR PRODUC...

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1-18-US-106094600EP1

Document POLY-O-HYDROXYAMIDE, POLYBENZOXAZOLE, AND ELECTRONIC COMPONENT INCLUDING A DIELECTRIC HAVING A BARRIER EFFECT AGAINST COPPER DIFFUSION, AND PROCESS...

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1-18-US-104245070TP1

Document METHOD FOR FABRICATING A PATTERNED LAYER ON A SEMICONDUCTOR SUBSTRATE, 10/424,507, No. 1-18-US-104245070TP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106739650LP1

Document CALIBRATION CONFIGURATION, 10/673,965, No. 1-18-US-106739650LP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106522910GP1

Document METHOD AND CONFIGURATION FOR COMPENSATING FOR UNEVENNESS IN THE SURFACE OF A SUBSTRATE, 10/652,291, No. 1-18-US-106522910GP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106205870BP1

Document CONFIGURATION AND METHOD FOR CHECKING AN ADDRESS GENERATOR, 10/620,587, No. 1-18-US-106205870BP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-1064940806P1

Document INTEGRATED MEMORY AND METHOD FOR SETTING THE LATENCY IN THE INTEGRATED MEMORY, 10/649,408, No. 1-18-US-1064940806P1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-104238120LP1

Document CIRCUIT CONFIGURATION AND METHOD FOR TRANSMITTING DIGITAL SIGNALS, 10/423,812, No. 1-18-US-104238120LP1 (U.S. Pat. App. Jul. 26, 2017)

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1-18-US-106807820GP1

Document METHOD AND APPARATUS FOR INTERNALLY TRIMMING OUTPUT DRIVERS AND TERMINATIONS IN SEMICONDUCTOR DEVICES, 10/680,782, No. 1-18-US-106807820GP1 (U.S. Pat. App....

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