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Displaying 564-578 of 819 results

CIRCUIT CONFIGURATION FOR DEACTIVATING WORD LINES IN A MEMORY MA...

Docket 09/925,170, U.S. Patent Application (Aug. 8, 2001)

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INTEGRATED CIRCUIT, TEST STRUCTURE AND METHOD FOR TESTING INTEGR...

Docket 09/929,303, U.S. Patent Application (Aug. 13, 2001)

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EDGE-TRIGGERED D-FLIP-FLOP CIRCUIT

Docket 09/946,994, U.S. Patent Application (Sept. 4, 2001)

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INTEGRATED SEMICONDUCTOR CONFIGURATION HAVING A SEMICONDUCTO...

Docket 09/935,623, U.S. Patent Application (Aug. 23, 2001)

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METHOD AND DEVICE FOR DATA EXCHANGE BETWEEN MEMORY AND LOGIC ...

Docket 09/935,503, U.S. Patent Application (Aug. 23, 2001)

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METHOD FOR FORMING AN INSULATOR HAVING A LOW DIELECTRIC CONSTAN...

Docket 09/918,428, U.S. Patent Application (July 27, 2001)

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SOI SUBSTRATE, A SEMICONDUCTOR CIRCUIT FORMED IN A SOI SUBSTRATE...

Docket 09/939,998, U.S. Patent Application (Aug. 27, 2001)

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MAGNETORESISTIVE MEMORY AND METHOD FOR READING A MAGNETORES...

Docket 09/946,941, U.S. Patent Application (Sept. 4, 2001)

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WAFER CLEANING APPARATUS

Docket 09/950,437, U.S. Patent Application (Sept. 10, 2001)

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DEVICE AND METHOD FOR COMBINING SCANNING AND IMAGING METHODS IN...

Docket 09/923,703, U.S. Patent Application (Aug. 6, 2001)

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MINIATURIZED CAPACITOR WITH SOLID-STATE DIELECTRIC, IN PARTICULAR F...

Docket 09/935,624, U.S. Patent Application (Aug. 23, 2001)

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SEMICONDUCTOR CONFIGURATION WITH OPTIMIZED REFRESH CYCLE

Docket 09/941,902, U.S. Patent Application (Aug. 29, 2001)

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INTEGRATED MEMORY AND CORRESPONDING OPERATING METHOD

Docket 09/917,553, U.S. Patent Application (July 27, 2001)

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MEMORY CELL AND PRODUCTION METHOD

Docket 09/927,554, U.S. Patent Application (Aug. 9, 2001)

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METHOD FOR FORMING A TRENCH IN A SEMICONDUCTOR SUBSTRATE

Docket 09/917,554, U.S. Patent Application (July 27, 2001)

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