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Displaying 639-653 of
819 results
Circuit configuration for generating an output clock signal with optimized signal gen...
Docket
09/773,220,
U.S. Patent Application
(Jan. 31, 2001)
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Integrated semiconductor memory
Docket
09/776,950,
U.S. Patent Application
(Feb. 5, 2001)
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Cite Docket
SEMICONDUCTOR MEMORY CONFIGURATION WITH A REFRESH LOGIC CIRCU...
Docket
09/767,380,
U.S. Patent Application
(Jan. 22, 2001)
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Cite Docket
CIRCUIT CONFIGURATION FOR AN INTEGRATED SEMICONDUCTOR MEMORY W...
Docket
09/750,399,
U.S. Patent Application
(Dec. 28, 2000)
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Cite Docket
METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS
Docket
09/751,961,
U.S. Patent Application
(Dec. 29, 2000)
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Cite Docket
INTEGRATED COMPONENT, COMPOSITE ELEMENT COMPRISING AN INTEGRA...
Docket
09/771,675,
U.S. Patent Application
(Jan. 29, 2001)
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Cite Docket
LEAD FRAME, CIRCUIT BOARD WITH LEAD FRAME, AND METHOD FOR PRODUC...
Docket
09/771,912,
U.S. Patent Application
(Jan. 29, 2001)
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Cite Docket
METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT HAVING A PARTICU...
Docket
09/732,136,
U.S. Patent Application
(Dec. 7, 2000)
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Cite Docket
Semiconductor memory of the dynamic random access type (DRAM) and method fo...
Docket
09/739,543,
U.S. Patent Application
(Dec. 15, 2000)
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Cite Docket
MEMORY CELL CONFIGURATION IN WHICH AN ELECTRICAL RESISTANCE OF A...
Docket
09/761,801,
U.S. Patent Application
(Jan. 16, 2001)
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Cite Docket
Method and apparatus for alternate operation of a random access memory in single...
Docket
09/766,465,
U.S. Patent Application
(Jan. 19, 2001)
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Cite Docket
Integrated semiconductor memory with a memory unit for storing addresses of defe...
Docket
09/751,958,
U.S. Patent Application
(Dec. 29, 2000)
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Cite Docket
METHOD OF TESTING MEMORY CELLS WITH A HYSTERESIS CURVE
Docket
09/722,118,
U.S. Patent Application
(Nov. 27, 2000)
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Cite Docket
METHOD FOR PRODUCING TRENCHES FOR DRAM CELL CONFIGURATIONS
Docket
09/753,589,
U.S. Patent Application
(Jan. 3, 2001)
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Cite Docket
