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Displaying 699-713 of 819 results

METHOD FOR MOUNTING A SEMICONDUCTOR CHIP ON A CARRIER LAYER AND...

Docket 09/514,265, U.S. Patent Application (Feb. 28, 2000)

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Integrated memory

Docket 09/513,587, U.S. Patent Application (Feb. 25, 2000)

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SEMICONDUCTOR MEMORY HAVING MEMORY BANK DECODERS DISPOSED S...

Docket 09/505,379, U.S. Patent Application (Feb. 16, 2000)

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CONVEYING SYSTEM

Docket 09/481,639, U.S. Patent Application (Jan. 12, 2000)

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INTEGRATED SEMICONDUCTOR CIRCUIT AND METHOD FOR FUNCTIONAL TES...

Docket 09/484,781, U.S. Patent Application (Jan. 18, 2000)

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POLISHING AGENT FOR SEMICONDUCTOR SUBSTRATES

Docket 09/491,296, U.S. Patent Application (Jan. 25, 2000)

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Mehtod for repairing defective memory cells of an integrated semiconductor memo...

Docket 09/483,738, U.S. Patent Application (Jan. 14, 2000)

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FERROELECTRIC MEMORY CONFIGURATION

Docket 09/440,818, U.S. Patent Application (Nov. 15, 1999)

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SEMICONDUCTOR COMPONENT HAVING AT LEAST ONE CAPACITOR AND MET...

Docket 09/449,716, U.S. Patent Application (Nov. 24, 1999)

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1-2-US-104524770HP1

Document CIRCUIT CONFIGURATION FOR SETTING THE INPUT RESISTANCE AND THE INPUT CAPACITANCE OF AN INTEGRATED SEMICONDUCTOR CIRCUIT CHIP, 10/452,477, No. 1-2-US-1045247...

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METHOD FOR INSTALLING PROTECTIVE COMPONENTS IN INTEGRATED CIRCU...

Docket 09/408,477, U.S. Patent Application (Sept. 28, 1999)

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INTEGRATED SEMICONDUCTOR CHIP HAVING LEADS TO ONE OR MORE EXTE...

Docket 09/374,895, U.S. Patent Application (Aug. 13, 1999)

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TRENCH CAPACITOR WITH AN INSULATION COLLAR AND METHOD FOR PRODU...

Docket 09/363,277, U.S. Patent Application (July 28, 1999)

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INTEGRATED SEMICONDUCTOR CHIP WITH MODULAR DUMMY STRUCTURES

Docket 09/363,263, U.S. Patent Application (July 29, 1999)

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CONFIGURATION FOR CROSSTALK ATTENUATION IN WORD LINES OF DRAM C...

Docket 09/322,718, U.S. Patent Application (May 28, 1999)

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