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PROCESS FOR STRUCTURING A PHOTORESIST LAYER, 10/134,104, No. 1-1-US-101341040GP1 (U.S. Pat. App. Dec. 16, 2004)
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SYNCHRONIZATION DEVICE FOR A SEMICONDUCTOR MEMORY DEVICE, 10/659,693, No. 1-1-US-1065969309P1 (U.S. Pat. App. Feb. 2, 2005)
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ELECTRONIC COMPONENT WITH EXTERNAL CONNECTION ELEMENTS, 09/951,823, No. 1-3-US-099518230PP1 (U.S. Pat. App. Nov. 29, 2004)
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METHOD FOR FABRICATING A SEMICONDUCTOR MEMORY DEVICE, 10/186,662, No. 1-1-US-101866620BP1 (U.S. Pat. App. Dec. 20, 2004)
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