Case IPR2017-00116
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
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`KINGSTON TECHNOLOGY COMPANY INC.,
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`Petitioner
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`v.
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`POLARIS INNOVATIONS LTD.,
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`Patent Owner
`____________
`
`Case IPR2017-00116
`Patent 7,334,150
`____________
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`PATENT OWNER’S REQUEST FOR DIRECTOR REVIEW
`PURSUANT TO UNITED STATES v. ARTHREX, 141 S. Ct. 1970 (2021)
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`KINGSTON TECHNOLOGY COMPANY INC.,
`
`Petitioner
`
`v.
`
`POLARIS INNOVATIONS LTD.,
`
`Patent Owner
`____________
`
`Case IPR2017-00116
`Patent 7,334,150
`____________
`
`PATENT OWNER’S REQUEST FOR DIRECTOR REVIEW
`PURSUANT TO UNITED STATES v. ARTHREX, 141 S. Ct. 1970 (2021)
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`TABLE OF CONTENTS
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`I.
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`II.
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`Page
`Technological And Procedural Background ............................................... 2
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`The Director Should Reject The Construction Allowing “One…
`Cop[y] Of The Incoming Clock Signal” To Have A Different
`Frequency Than “The Incoming Clock Signal,” And Find This
`Limitation Absent In Lee. ............................................................................. 4
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`A.
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`B.
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`“Copies” Of “Signals” Have The Same Frequency As The
`Signals. .................................................................................................. 4
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`Lee’s 1/2-Frequency WCLK/2 Is Not A Copy Of A Clock
`Signal. ................................................................................................... 9
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`III. The Director Should Reject The Finding That Lee Teaches The
`Register Generating Copies Of The Incoming Command And
`Address Signals. ........................................................................................... 12
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`IV. The Director Should Reject The Finding That Lee Teaches Claim 5’s
`“Clock Signal Regeneration Circuit And…Register Circuit [That]
`Are Integrated On A Common Chip In The Common Chip Packing.” 13
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`V.
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`The Director Should Vacate And Remand. .............................................. 14
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`VI. A Principal Officer Or His Delegate Must Perform Director Review. .. 15
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`VII. Conclusion .................................................................................................... 15
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`TABLE OF AUTHORITIES
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`COURT DECISIONS
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`Page(s)
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`Aspex Eyewear v. Marchon Eyewear, 672 F.3d 1335 (Fed. Cir. 2012) .................. 11
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`In re Benno, 768 F.2d 1340 (Fed. Cir. 1985) ........................................................... 11
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`In re Chu, 66 F.3d 292 (Fed. Cir. 1995) .................................................................. 12
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`Fin Control Sys. Pty., Ltd. v. OAM, Inc., 265 F.3d 1311 (Fed. Cir. 2001) ................ 5
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`L.M.-M. v. Cuccinelli, 442 F. Supp. 3d 1 (D.D.C. 2020) ........................................ 15
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`NTP, Inc. v. Res. In Motion, Ltd., 418 F.3d 1282 (Fed. Cir. 2005) ........................... 6
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`United States v. Arthrex, 141 S. Ct. 1970 (2021) ............................................... 1, 15
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`STATUTES
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`5 U.S.C. § 554(b) ....................................................................................................... 2
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`5 U.S.C. § 554(c) ....................................................................................................... 2
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`5 U.S.C. § 556(d) ....................................................................................................... 2
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`5 U.S.C. § 556(e) ....................................................................................................... 2
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`5 U.S.C. § 557(b) ....................................................................................................... 2
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`5 U.S.C. § 557(c) ....................................................................................................... 2
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`35 U.S.C. § 317(a) ................................................................................................... 14
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`RULES, RULEMAKING, AND OTHER AGENCY AUTHORITIES
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`USPTO, Arthrex Q&As, Question A1 (July 20, 2021) ............................................. 2
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`ii
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`EXHIBIT LIST
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`2001
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`Excerpt of Markman Hearing Transcript, IpLearn-Focus, LLC v.
`Microsoft Corp., No. 14-00151 (N.D. Cal. Dec. 12, 2014)
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`2002
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`Excerpt from Joint Claim Construction Statement & Appendix
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`2003
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`Excerpt from Kingston Preliminary Invalidity Contentions
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`2004
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`Sample of Petition and Expert Declaration Mirror
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`2005
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`Excerpt from Wiley Elec. & Electronics Eng’g Dictionary (2004)
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`2006
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`Excerpt from The Illustrated Dictionary Of Electronics (8th ed. 2001)
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`2007
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`Excerpt from R. Graf, Modern Dictionary Of Electronics (7th ed.
`1999)
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`2008
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`Excerpt from Newnes Dictionary Of Electronics (4th ed. 1999)
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`2009
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`Excerpt from Oxford English Dictionary (2d ed. 1989)
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`2010 Micron Technical Note 4721
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`2011
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`Declaration of Nathan Nobu Lowenstein ISO Motion for PHV
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`2012
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`Subramanian Deposition Exhibit 2012 (Jun. 27, 2017)
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`2013
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`Subramanian Deposition Exhibit 2013 (Jun. 27, 2017)
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`2014
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`Subramanian Deposition Exhibit 2014 (Jun. 27, 2017)
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`2015
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`Subramanian Deposition Exhibit 2015 (Jun. 27, 2017)
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`2016
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`Subramanian Deposition Exhibit 2016 (Jun. 27, 2017)
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`iii
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`2017
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`Subramanian Deposition Exhibit 2017 (Jun. 27, 2017)
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`2018
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`Transcript of Deposition of Vivek Subramanian, Ph.D. (Jun. 27, 2017)
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`2019
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`Declaration of Prof. Joseph Bernstein, Ph.D.
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`2020
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`2021
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`Scott Mueller, “Upgrading and Repairing PCs: Memory,” InformIT
`(Jan. 6, 2010) available at
`http://www.informit.com/articles/article.aspx?p=1416688&seqNum=4
`
`Tomek Jasionowski, “RDIMMs Maximize Server Performance,
`Reliability, and Scalability,” EE Times (Mar. 26, 2012), available at
`http://www.eetimes.com/document.asp?doc_id=1279507&print=yes
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`2022
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`Ex parte Kim, Appeal No. 2014-005357 (PTAB Jun. 24, 2016)
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`2023
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`Ex parte Tapler, Appeal No. 2013-004822 (PTAB Jun. 22, 2015)
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`2024
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`Arteris, Inc. v. Sonics, Inc., Appeal No. 2014-006504 (PTAB Oct. 8,
`2014)
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`2025
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`U.S. Patent Pub. No. 2005/0008114 A1 (“Moon”)
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`2026
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`European Patent No. 1,046,996 A1 (“Scherzer”)
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`2027
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`U.S. Patent No. 7,266,786 B2 (“Chou”)
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`2028
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`Julio Sanchez and Maria P. Canton, Embedded Systems Circuits and
`Programming (2012)
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`2029
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`PC2-4300 Specification Sheet
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`2030
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`PC4 Diagram
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`2031
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`PC4 Bill of Materials
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`iv
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`2032
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`2033
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`2034
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`John Nieto, “Evolving to DDR3 Technology,” EDN Network (May 28,
`2009), available at http://www.edn.com/design/systems-
`design/4314007/Evolving-to-DDR3-technology
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`“Upgrading a Server or Workstation? Read this first!,” Crucial Forum
`(Dec. 12, 2014), available at
`http://forums.crucial.com/t5/tkb/articleprintpage/tkb-
`id/dram@tkb/article-id/86
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`“PowerEdge: What Are the Different Types of Memory DIMMs for
`Servers?” Dell.com (May 31, 2017), available at
`https://www.dell.com/support/article/us/en/19/SLN306395/poweredge-
`-what-are-the-different-types-of-memory-dimms-for-servers-
`?lang=EN)
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`2035
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`Ex parte Doorhy, Appeal No. 2015-001838 (PTAB Oct. 25, 2016)
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`2036
`[NEW]
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`Email thread between Petitioner counsel, Patent Owner counsel, and
`PTAB Staff re Request to Withdraw: IPR2016-01621, IPR2016-
`01622, IPR2017-00116
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`2037
`[NEW]
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`Principal Brief of Patent Owner (Dkt. 31), Polaris Innovations Ltd. v.
`Kingston Tech. Co., Inc. & Iancu (Fed. Cir. No. 18-1831, Dec. 21,
`2018)
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`2038
`[NEW]
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`Reply Brief of Patent Owner (Dkt. 53), Polaris Innovations Ltd. v.
`Kingston Tech. Co., Inc. & Iancu (Fed. Cir. No. 18-1831, June 5,
`2019)
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`2039
`[NEW]
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`Notice of Oral Argument (Dkt. 70), Polaris Innovations Ltd. v.
`Kingston Tech. Co., Inc. & Iancu (Fed. Cir. No. 18-1831, Sep. 20,
`2019)
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`2040
`[NEW]
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`Decision Remanding Under Arthrex (Dkt. 97), Polaris Innovations
`Ltd. v. Kingston Tech. Co., Inc. & Iancu, (Fed. Cir. 2020) (per curiam)
`(nonprecedential) (No. 18-1831, slip op., Jan. 31, 2020)
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`2041
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`Order On Petitions For Panel Reh’g And Reh’g En Banc (Dkt. 106),
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`v
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`[NEW] Polaris Innovations Ltd. v. Kingston Tech. Co., Inc. & Iancu, (Fed.
`Cir. 2020) (per curiam) (nonprecedential) (No. 18-1831, slip op., Mar.
`16, 2020)
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`2042
`[NEW]
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`Letter order re grant of certiorari, Polaris Innovations Ltd. v. Kingston
`Tech. Co., Inc., No. 19-1459 (Nos. 18-1831, 19-1202 et al.) (June 28,
`2021)
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`2043
`[NEW]
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`Order Remanding Under United States v. Arthrex (Dkt. 123), Polaris
`Innovations Ltd. v. Kingston Tech. Co., Inc. & Iancu, (Fed. Cir. 2021)
`(per curiam) (nonprecedential) (No. 18-1831, slip op., Sep. 22, 2021)
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`vi
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`Patent Owner respectfully requests Director review, under United States v.
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`Arthrex, 141 S. Ct. 1970 (2021), of the Patent Trial and Appeal Board’s decision in
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`this inter partes review finding claims 1–5, 6, and 8–11 of the ’150 patent obvious.
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`The Board construed “register circuit ... configured to receive one of the copies of
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`the incoming clock signal,” to not require the “one ... cop[y] of the incoming clock
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`signal” to have the same frequency as “the incoming clock signal.” There is no
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`support for this implausible departure from the plain meaning of “copy.” The prior
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`art reference, Lee, teaches no such same-frequency copies of an incoming clock
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`signal. Even aside from this glaring claim construction error, the art is plainly
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`missing other limitations too, such as generating copies of the incoming command
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`and address signals and the “common chip” limitations of claim 5. The Director
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`should require “the incoming clock signal” and “copies of the incoming clock
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`signal” to have the same frequency, correct the other errors, and remand.
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`The Federal Circuit remanded this case to the Director after it was fully
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`briefed on appeal, and after a writ of certiorari was granted. Exs. 2037-2038
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`(briefing), 2039 (notice of oral argument), 2040 (original remand order), 2042
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`(grant of certiorari), 2043 (final remand order). The parties to this case settled
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`their dispute in mid-2020, and Petitioner has been seeking to withdraw from the
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`case ever since. Ex. 2036. A request to authorize a motion to terminate for
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`settlement remains pending. Id. The appeal in this extraordinary case has already
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`fully briefed the Board’s glaring claim construction and other errors. The Director
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`should correct those glaring errors.
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`“The Director’s review may address any issue, including issues of fact and
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`issues of law, and will be de novo.” USPTO, Arthrex Q&As, Question A1. Since
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`the Director’s review of the Board is in a formal adjudication, it must comply with
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`APA §§ 554(b)–(c), 556(d)–(e), and 557(b)–(c).
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`I.
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`Technological And Procedural Background
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`The Board adopted an unsupported construction of the limitation found in all
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`challenged claims—“a register circuit ... configured to receive one of the copies of
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`the incoming clock signal…”—contrary to the claim language, the specification,
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`the prosecution history and both parties’ experts.
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`The 150 patent is directed to improvements in dynamic random access
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`memory (DRAM) modules, often referred to as DIMMs. Ex. 1001, 1:20-64, 2:5-
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`12. The patent discusses two signal types important to DIMM operation: the “clock
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`signal” (often abbreviated as “Cl” or “CLK”) and “command and address signals”
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`(often abbreviated as “command/address” or “CA”). Id., 2:24-32); Ex. 2019 ¶ 43.
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`As annotated FIG. 1 of the patent shows below, the clock (“Cl”) signals and
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`command and address (“CA”) signals are distinct signals carried on DIMM “clock
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`signal lines” and “CA signal lines” respectively.
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`On each clock cycle, the DIMM memory controller provides CA signals to
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`each DRAM, which are integrated with the clock signal. Ex. 1019 ¶¶ 44–45.
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`Adding DRAM chips, or speeding up data transfer by providing multiple copies of
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`CA and CK signals, multiplied the required pins and routing per DIMM “to an
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`excessive degree,” quickly exceeding the limited space available on the module.
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`Ex. 1001, 1:29-41, 2:14-20; Ex. 1019 ¶¶ 49–51. The patent solved this bottleneck,
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`by adding to the DIMM (i) a clock signal regeneration circuit that generates same-
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`frequency copies of an incoming clock signal and (ii) a register circuit generating
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`same-frequency copies of the incoming CA signals, and supplying these copies to
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`the DRAM chips so only one incoming signal has to be supplied from the memory
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`controller to a DIMM. Ex. 1001, 6:6–21, 7:2–47. The fact that the incoming
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`signals and the local copies of those signals have the same frequency allows the
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`DIMM’s operation to be synchronized to the incoming signals. Id., 2:64-67.
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`As seen on annotated FIG. 2 above, the invention also puts the clock signal
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`regeneration circuit and register circuit in a common chip packing to save space
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`and help heat distribution, and supplies one of the copies of the incoming clock
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`signal from the clock signal regeneration circuit to the register circuit. Id., 3:18-51.
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`The Board instituted trial on all grounds and claims. Most of the parties’
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`briefing was devoted to the Dodd grounds, but the Board’s final written decision
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`did not reach the Dodd grounds. Paper 31, 53–54. Instead the Board addressed
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`only the Lee grounds, finding claims 1, 2, 5, 6, and 8–10 obvious over Lee and
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`claims 3 and 11 obvious over Lee in view of Keeth. Id.
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`II.
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`The Director Should Reject The Construction Allowing “One… Cop[y]
`Of The Incoming Clock Signal” To Have A Different Frequency Than
`“The Incoming Clock Signal,” And Find This Limitation Absent In Lee.
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`A.
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`“Copies” Of “Signals” Have The Same Frequency As The Signals.
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`The Board erred by adopting an incorrect construction that allows “one of
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`the copies of the incoming clock signal” that the register is configured to receive to
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`have a different frequency than the incoming clock signal—even though the claim
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`expressly recites “the copies of the incoming clock signal having a same frequency
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`as the incoming clock signal.” The construction is, moreover, inconsistent with the
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`specification, ignores the prosecution history that the claims are intended to define
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`“copies” as having the same frequency, and rejects the opinions of both experts.
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`The claim language expressly defines “the copies of the incoming clock
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`signal” as “having a same frequency as the incoming clock signal.” Ex. 1001, 7:8-
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`18. Yet the Board construed this language to mean the copies of the incoming
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`clock signal to be supplied to the memory chips must have the same frequency as
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`the incoming clock signal, but the “one of the copies of the incoming clock signal
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`from the clock regeneration circuit” that the register circuit is configured to receive
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`can have a different frequency than the incoming clock signal. Pet., 10. Thus, the
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`Board concluded “copies of the incoming clock signal,” a phrase that appears four
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`times in Claim 1, means something different in the phrase “one of the copies of the
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`incoming clock signal” than every other time it appears. That is plainly incorrect.
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`“First, we begin with the presumption that the same terms appearing in
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`different portions of the claims should be given the same meaning unless it is clear
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`from the specification and prosecution history that the terms have different
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`meanings at different portions of the claims.” Fin Control Sys. Pty., Ltd. v. OAM,
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`Inc., 265 F.3d 1311, 1318 (Fed. Cir. 2001). Here, the specification and prosecution
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`clearly show the terms have the same meaning.
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`Second, when a claim term is repeated later in a claim using words such as
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`“the” or “said,” the repetitions of the same term are understood to mean and refer
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`to the same thing as the first time. See, e.g., NTP, Inc. v. Res. In Motion, Ltd., 418
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`F.3d 1282, 1306 (Fed. Cir. 2005). “In grammatical terms, the instances of ‘said…’
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`[later such phrases] in the claim are anaphoric phrases, referring to the initial
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`antecedent phrase.” Applying this principle, each of the three repetitions of “the
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`copies of the incoming clock signal” refers to the same thing and has the same
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`meaning as the claim term “copies of the incoming clock signal” when it first
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`appears. The claim recites four aspects of the “copies”: (1) they are generated; (2)
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`they are supplied to the memory chips; (3) they have the same frequency as the
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`incoming clock signal of which they are copies; and (4) one of them can be
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`received by a register circuit. In each instance, under the basic principles above,
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`the claim describes the same “copies of the incoming clock signal”: each recitation
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`of “the copies” has the same antecedent basis and refers to the same thing, with the
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`same frequency as the incoming clock signal of which it is a copy.
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`The prosecution confirms that all the “copies” have the same frequency.
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`When the Applicant amended these claims to add the language “the copies of the
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`incoming clock signal having a same frequency as the incoming clock signal” (and
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`deleted “multiply the conditioned clock signal . . . signals by a factor of 1:X”), it
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`explained that the claims were being
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`amended to avoid a potential misinterpretation of the claim language.
`In particular, Applicant’s memory module is not described as
`modifying the frequency of an incoming clock signal or command
`and address signal; rather, the memory module generates plural
`copies of… these signals. Thus, for example, the recitation in
`original claim 1 of “respectively multiply [sic] the conditioned clock
`signal and the temporarily stored command and address signals by a
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`factor of 1:X,” was intended to mean that X copies of these signals are
`produced, not that the clock rate is multiplied by a factor of X.
`Independent claims 1 and 13 have been amended to clarify that the
`recited circuits generate copies of signals rather than increase the
`frequency of the signals.... In other words, the copies of the clock
`signal are indeed copies at least in the sense that the frequency of
`the copies is the same as that of the original incoming clock signal.
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`Ex. 1002, 33 (emphases added). The applicant proceeded to distinguish prior art
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`from the claims on the basis that “the frequencies of the clock and the address
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`signals copied on the claimed memory module are respectively identical to the
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`frequencies of the received clock, address and command signals,” while the art
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`reference, in contrast, was “designed and intended to modify the frequency of
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`incoming clock and [CA] signals,” and specifically to “frequency-divide[] [them]
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`by the factor two,” so the reference’s outputted signals “c[ould ]not reasonably be
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`regarded or interpreted as copies of the incoming signal, particularly in view of
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`the claim requirement that the copies have the same frequency as the incoming
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`signals.” Id., 33-34 (emphases added). The applicant could not have been clearer.
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`The Board’s construction is also contrary to the patent specification, which
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`repeatedly states that the incoming signal is multiplied by a factor of 1:X to
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`generate the copies. Ex. 1001 at, e.g., 6:29-31 (“for multiplying the CA signals and
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`clock signals by a factor of 1:X as is proposed according to the invention”), 2:47-
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`51, 3:61-64, 4:46-49, 5:32:35, 5:54-55, 5:66-6:2, 6:14-15, 6:18-19. Nothing
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`in the patent suggests creating a copy of a signal that has a modified frequency.
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`And nothing in it suggests that the copies should only be the same frequency for
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`some copies, not others. Id., e.g., 3:61-63, 6:27-31.
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`The parties and their experts agreed that the patents disclosed “copying, not
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`frequency multiplication,” Ex. 1011 [Subramanian Decl.] ¶ 23; Ex. 2018, 16:1-8,
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`126:6-23, 105:24-108:12; Ex. 2019 [Bernstein Decl.] ¶¶ 66, 103, and sought to
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`“ensure that the frequency of the incoming signal and the frequencies of the copies
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`of the incoming signal are the same,” Pet., 15; Ex. 1011 ¶¶ 29-30. Contrary to the
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`Board’s assertion, FWD, 14, this testimony was neither unclear nor unexplained.
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`None of the Board’s rationales for its contrary construction succeeds. First,
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`the Board reasoned that because “‘having a same frequency’ ... immediately
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`follows the supply of signals to the memory chips” in the claim language, only the
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`copies to be supplied to the memory chips have the same frequency—not the
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`copies to be supplied to the register from the very same clock signal regeneration
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`circuit that generated them. FWD, 10. This reasoning, however, contradicts the
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`intrinsic and extrinsic evidence discussed above establishing that there is no
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`modification of the frequency in any of the “copies” in the patent. And nothing in
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`the claim language “the copies of the incoming clock signal having a same
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`frequency as the incoming clock signal” suggests that it modifies only the
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`immediately preceding phrase “to supply the copies of the incoming signal to the
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`memory chips”: rather, it plainly applies to the limitation in its entirety.
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`Next, the Board reasoned that construing the “copies” to all be the same
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`frequency “would require ‘one of the copies of the incoming clock signal from the
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`clock regeneration circuit’ received by the register circuit also be supplied to at
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`least one of the memory chips.” FWD, 11. That reasoning is circular. It assumes
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`without basis that all of the recited “copies” must be supplied to the memory chips.
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`That is not what the claim language requires. And as shown above, construing the
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`“copies” to be of different frequencies would directly contradict the exhaustive,
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`definitional prosecution history and written description above, and both experts.
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`The Board misapprehends Dr. Bernstein’s testimony, interpreting it as being
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`limited to the copies supplied to the memory chips and not the copied clock signal
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`coming into the register, FWD, 13-14, and ignoring his unequivocal testimony that
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`“the clock signal coming into the register circuit must have the same frequency as
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`the incoming clock signal,” Ex. 2019 ¶103. The Board misreads Dr. Subramanian’s
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`testimony in similar fashion, FWD, 14, ignoring his testimony saying exactly the
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`opposite, quoted above, Ex. 2018, 105:24-108:12, 125:14-23.
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`For these reasons, the Board’s construction that the “copies” claimed can be
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`of differing frequencies is clearly erroneous.
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`B.
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`Lee’s 1/2-Frequency WCLK/2 Is Not A Copy Of A Clock Signal.
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`Lee does not disclose or render obvious a copy of the incoming clock signal
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`that is the same as the incoming clock signal. The only clock signal Lee’s register
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`circuit 45 is configured to receive from the PLL is the WCLK/2 signal, which is “a
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`local WCLK signal (shown as divided by two).” Ex. 1008 [Lee], 7:35-41, Fig. 4.
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`It is undisputed that WCLK/2 has half of the frequency of the incoming clock
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`signal WCLK. See, e.g., Ex. 2018, 207:5-13; Ex. 2019 ¶ 105. Indeed, as shown
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`above, a frequency-halving reference like Lee is no different for this purpose than
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`the “frequency-divided by the factor two” art Applicant expressly distinguished
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`during prosecution. Ex. 1002, 33.
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`The Petition argued that “the register ... configured to receive one of the
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`copies of the incoming clock signal from the clock regeneration circuit” was met
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`by Lee’s disclosure of the “WCLK/2” signal received by the register. Petition, 45.
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`Since WCLK/2 does not have the same frequency as WCLK, that is clearly wrong.
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`Nor does Lee render it obvious to modify WCLK/2 to be WCLK, i.e., to
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`have the same frequency as the incoming signal. Patent Owner’s expert testified
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`without rebuttal that this change would not be obvious and would not be expected
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`to “function properly.” Ex. 2019 ¶¶ 64, 108. Petitioner’s expert never argued such
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`a modification was obvious, only that Lee already “discloses” the limitation. Ex.
`
`1011 ¶ 77. Lee only teaches a WLCK/2 signal, frequency-divided by two, and
`
`teaches that Lee deliberately halved the frequency of WLCK to save power. Ex.
`
`2018, 207:17-208:3. And the claims do not require merely copies theoretically
`
` 10
`
`
`
`
`
`capable of being the same frequency as the incoming signal: they require the
`
`register be “configured for” (designed or adapted for) generating the copies. Aspex
`
`Eyewear, Inc. v. Marchon Eyewear, Inc., 672 F.3d 1335, 1349 (Fed. Cir. 2012).
`
`Finally, Lee’s claim 31 does not support this contention. Lee claim 31
`
`recites “wherein the frequency of said additional data write clock signal is at a
`
`frequency of X/N where X is the frequency of said received data write clock signal
`
`and N is an integer.” But a prior art patent “discloses only that which it describes,”
`
`not everything within the theoretical scope of its claims. In re Benno, 768 F.2d
`
`1340, 1345-46 (Fed. Cir. 1985) (overturning Board’s reliance on prior art
`
`reference’s claim “broad enough to read on” challenged patent claims, because the
`
`“measure of what [prior art] discloses” is “only that which it describes,” not “[t]he
`
`scope of [its] claims”). Claim 31 of Lee does not teach that N can be 1 (which is
`
`what is necessary for its additional clock signal to be the same frequency as its
`
`received clock signal). The only disclosure of any alleged copy of a clock signal in
`
`Lee’s embodiments is WCLK/2, which is expressly “shown as divided by two”
`
`(i.e., N=2). Ex. 1008, 7:37-38. The Board failed to provide any reason why the
`
`POSITA would be motivated to modify Lee’s teaching of a frequency-divided
`
`clock signal (N=2) to provide a same-frequency clock signal (N=1) instead.
`
`Lee’s half-frequency signal WCLK/2 is intended to save power. Ex. 2018,
`
`207:17-208:3. The patent’s different, same-frequency signal is intended to allow
`
` 11
`
`
`
`
`
`synchronization. Ex. 2019 ¶ 64; Ex. 1001, 2:18-32, 2:47-67. That is no mere
`
`“design choice.” Rather, it solves a stated problem, “results in a different function,
`
`[and] give[s] unexpected results.” In re Chu, 66 F.3d 292, 299 (Fed. Cir. 1995).
`
`III.
`
`The Director Should Reject The Finding That Lee Teaches The Register
`Generating Copies Of The Incoming Command And Address Signals.
`
`The Board also erred in its unsupported finding that Lee renders obvious the
`
`register circuit configured to generate copies of the CA signals. That limitation
`
`contradicts Lee’s teaching of more CA signal lines going into the register than
`
`coming out, which points away from the register making copies as claimed.
`
`The Board relies on Lee Fig. 4. However, as Patent Owner has explained, it
`
`is undisputed that in Lee Fig. 4, “more lines of command/address signals are
`
`entering the register than leaving” it, since only one CA bus is present at the output
`
`of the register. Paper 30, lines 22-25. The plain fact is that Lee never even
`
`mentions making copies of signals. And given the fact that more lines are entering
`
`the register than leaving it, there is no basis to infer it is silently making any copies
`
`at all—and no basis for the Board to dismiss the significance of that fact. Since
`
`nothing in Lee suggests that there is any need for copying the CA signals at all, it
`
`follows that nothing suggests using the dual bus of Lee to do the copying either.
`
`The 150 Patent, in sharp contrast, expressly discloses the claimed copying in its
`
`quite different synchronization invention, as already discussed above.
`
`For this further reason, the Director should vacate the obviousness finding.
`
` 12
`
`
`
`
`
`IV.
`
`The Director Should Reject the Finding That Lee Teaches Claim 5’s
`“Clock Signal Regeneration Circuit And…Register Circuit [That] Are
`Integrated On A Common Chip In The Common Chip Packing.”
`
`The Board erred in finding it “obvious” to integrate the register circuit and
`
`the clock signal regeneration circuits on a common chip in a common chip packing
`
`as claimed, even though in prior art one is digital and the other analog, and such
`
`combination would be expensive and difficult.
`
`Patent Owner’s expert testified without rebuttal that “[i]t is difficult and
`
`expensive to integrate analog and digital systems on a single chip,” making it not
`
`obvious to integrate Lee’s register circuit (digital) and PLL (analog) on a common
`
`chip in a common chip packing. Ex. 2019 ¶¶ 118-119 (citing Ex. 1001, 5:40-43).
`
`The Board dismissed this testimony on the basis of an unrelated portion of
`
`another reference, Dodd, not found in the Lee grounds, FWD, 42, and on the
`
`conclusory assertion by Petitioner’s expert that to integrate analog and digital
`
`systems on a single chip was “the industry trend” at the time, Ex. 1011 ¶¶ 76, 82.
`
`The Board ignored Patent Owner’s evidence and testimony that this supposed
`
`“trend” did not begin until years after the patent was filed, because the benefits of
`
`moving the register and PLL to a single chip were not recognized until DDR3 ws
`
`developed in the late 2000s. Ex. 2019 ¶¶ 120-121 (citing Ex. 2032 [5/09 article]).
`
`And it ignores Dodd’s explicit teachings against integrating digital circuits (like
`
`Lee’s register circuit 45) with a PLL, because of the difficulty in such systems of
`
` 13
`
`
`
`
`
`“introduce[ing] analog design complications in a mainly digital design.” Ex. 1003,
`
`5:40-42. The only other support Petitioner presented was the conclusory assertion
`
`by its expert, which has no support, and so is entitled to no weight. Ex. 1011 ¶ 76.
`
`As for Lee’s disclosure that its memory controller 11 could “be a one-chip
`
`memory controller or a chip set,” Ex. 1008, 8:24-28, this disclosure is not even
`
`directed to Lee’s alleged common copy on the DIMM allegedly integrating Lee’s
`
`register circuit and PLL. Rather, this is the packaging option for Lee’s memory
`
`controller, id., which is external to Lee’s memory subsystem 27 containing Lee’s
`
`alleged PLL 41 and register 45. There is no suggestion it would be obvious to
`
`implement the memory controller’s packaging option for the common chip in the
`
`DIMM. And as Dr. Bernstein testified without rebuttal, Lee’s complexity and nine
`
`separately controlled output signals specifically teach against modifying Lee in
`
`such a way, because of the great complexity of doing so. Ex. 2019 ¶¶ 119-121.
`
`V.
`
`The Director Should Vacate And Remand.
`
`Because the case is settled, the Board and parties should have an opportunity
`
`to address termination under 35 U.S.C. § 317(a). Furthermore, the Board relied
`
`only on the Lee grounds, and did not reach the merits of the Dodd grounds.
`
`Accordingly, if the Director does not grant the pending requests to move to
`
`terminate and terminate this case under § 317, the Director should vacate the
`
`Board’s erroneous decision finding obvious based on the Lee grounds and remand.
`
` 14
`
`
`
`
`
`VI.
`
`A Principal Officer Or His Delegate Must Perform Director Review.
`
`Consistent with the Supreme Court’s holding in Arthrex, consideration of
`
`this request for review must be by a principal Officer appointed by the President
`
`and confirmed by the Senate, or his proper delegate. See, e.g., LM-M v. Cuccinelli,
`
`442 F. Supp. 3d 1, 23-24 (D.D.C. 2020) (“The fact that an officer holds a PAS
`
`office [(i.e., appointed by the President, with the advice and consent of the Senate)]
`
`does not mean, however, that one who performs the duties of that office in an
`
`acting capacity is also a PAS officer.”), 35-37 (holding that actions that are
`
`committed to PAS officer, but performed “without lawful authority” by non-PAS
`
`officeholder, “must be set aside”).
`
`VII.
`
`Conclusion
`
`This case settled in 2020. The Director should grant the pending request to
`
`authorize a motion to terminate for settlement under § 317, and terminate the case.
`
`If the case is not terminated for settlement, the Director should review and
`
`vacate the Board’s clearly wrong decision, which no party defends as correct.
`
`
`
`Respectfully submitted,
`
`Date: October 22, 2021
`
`____/ Kenneth J. Weatherwax /_________
`Kenneth J. Weatherwax, Reg. No. 54,528
`Lowenstein & Weatherwax LLP
`
` 15
`
`
`
`
`
`CERTIFICATE OF SERVICE
`
`The undersigned hereby certifies that the following documents were served
`by electronic service, by agreement between the parties, on the date signed below:
`
`
`PATENT OWNER’S REQUEST FOR DIRECTOR REVIEW
`PURSUANT TO UNITED STATES v. ARTHREX, 141 S. Ct. 1970 (2021)
`
`
`The names and address of the parties being served are as follows:
`
`IPR37307-0009IP1@fr.com
`IPR@sjclawpc.com
`
`
`Respectfully submitted,
`
` / Kenneth J. Weatherwax /
`
`Date: October 22, 2021
`
`
`
`
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