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`-» INTEL 1015
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`INTEL 1015
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`

`

`
`
`Ade
`Univers!
`
`LS. Sedra
`ty of Waterloo
`
`Kenneth C. Smith
`University of Toronto
`
`Oxford
`New York
`OXFORD UNIVERSITY PRESS
`2004
`
`
`
`
`

`

`
`
`Oxford University Press
`
`Oxford New York
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`Copyright © 1982, 1987, 1991, 1998, 2004 by Oxford University Press, Inc.
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`Published by Oxford University Press, Inc.
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`Oxford is a registered trademark of Oxford University Press
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`All rights reserved. No part ofthis publication may be reproduced,
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`electronic, mechanical, photocopying, recording, or otherwise,
`without the prior permission of Oxford University Press.
`
`Library of Congress Cataloging-in-Publication Data
`Sedra, Adel S.
`Microelectronic circuits / Adel S. Sedra, Kenneth C. Smith.--5th ed.
`p. cm. -- (Oxfordseries in electrical and computer engineering)
`Includes index.
`ISBN 0-19--514251-9
`1. Electronic circuits. 2. Integrated circuits.
`IL. Title. TH. Series.
`TK7867 .S39 2003
`62 1.381--de22
`
`I. Smith, Kenneth C.
`
`2003066178
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` Printing number: 987654321
`
` Printed in the United States of America
`
`
`Cover Illustration: The chip shownis an inside view of a mass-produced surface-micromachined gyroscopesys-
`tem, integrated on a 3mmby 3mm die, andusing a standard 3-m 2-V BiCMOSprocesssuited for the harsh auto-
`motive environment. This
`first single-chip gyroscopic sensor,
`in which micro-mechanical and electronic
`components are intimately entwined on the same chip, provides unprecedented performance through the use of a
`collection of precision-directed techniques, including emphasis on differential operation (both mechanically and
`electronically) bolstered by trimmable thin-film resistive components. This tiny, robust, low-power, angular-rate-
`to-voltage transducer, having a sensitivity of 12.5mV/°/s and resolution of 0.015°/s (or 50°/hour) has a myriad of
`applications—including automotive skid control androllover detection, dead reckoning for GPS backup androbot
`motion control, and camera-field stabilization. The complete gyroscope package, weighing 1/3 gram with a vol-
`ume of 1/6 cubic centimeter, uses 30mW from a 5-V supply. Source: John A. Geen, Steven J. Sherman, John F.
`Chang, Stephen R. Lewis; Single-chip surface micromachined integrated Gyroscope with 50°/h Allan deviation,
`IEEE Journal of Solid-State Circuits, vol. 37, pp. 1860-1866, December 2002. (Originally presented at ISSCC
`2002.) Photographed by John Chang, provided by John Geen, both of Analog Devices, Micromachine Products
`Division, Cambridge, MA, USA.
`
`on acid-free paper
`
`

`

`Lu=LuOocY=
`VY)-—WU
`CcW
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`Yz©OciWW
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`

`
`THE OXFORD SERIES IN ELECTRICAL AND COMPUTER
`ENGINEERING
`
`
`
`Adel S. Sedra, Series Editor
`
`
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`
`
`Alien and Holberg, CMOS Analog Circuit Design, 2nd Edition
`Bobrow, Elementary Linear Circuit Analysis, 2nd Edition
`Bobrow, Fundamentals of Electrical Engineering, 2nd Edition
`Burns and Roberts, An Introduction to Mixed-Signal IC Test and Measurement
`Campbell, The Science and Engineering of Microelectronic Fabrication, 2nd Edition
`Chen, Digital Signal Processing
`Chen, Linear System Theory and Design, 3rd Edition
`Chen, Signals and Systems, 3rd Edition
`Comer, Digital Logic and State Machine Design, 3rd Edition
`Comer, Microprocessor-based System Design
`Cooper and McGillem, Probabilistic Methodsof Signal and System Analysis, 3rd Edition
`DeCarlo and Lin, Linear Circuit Analysis, 2nd Edition
`Dimitrijev, Understanding Semiconductor Devices
`Fortney, Principles of Electronics: Analog & Digital
`Franco, Electric Circuits Fundamentals
`Ghausi, Electronic Devices and Circuits: Discrete and Integrated
`Guru and Hiziroglu, Electric Machinery and Transformers, 3rd Edition
`Houts, Signal Analysis in Linear Systems
`Jones, [ntroduction to Optical Fiber Communication Systems
`Krein, Elements of Power Electronics
`Kuo, Digital Control Systems, 3rd Edition
`Lathi, Linear Systems and Signals, 2nd Edition
`Lathi, Modern Digital and Analog Communications Systems, 3rd Edition
`Lathi, Signal Processing and Linear Systems
`Martin, Digital Integrated Circuit Design
`Miner, Lines and Electromagnetic Fields for Engineers
`Parhami, Computer Arithmetic
`Roberts and Sedra, SPICE, 2nd Edition
`Roulston, An Introduction to the Physics of Semiconductor Devices
`Sadiku, Elements of Electromagnetics, 3rd Edition
`Santina, Stubberud, and Hostetter, Digital Control System Design, 2nd Edition
`Sarma, /ntroduction to Electrical Engineering
`Schaumann and Van Valkenburg, Design ofAnalog Filters
`Schwarz and Oldham, Electrical Engineering: An Introduction, 2nd Edition
`Sedra and Smith, Microelectronic Circuits, Sth Edition
`Stefani, Savant, Shahian, and Hostetter, Design of Feedback Control Systems, 4th Edition
`Tsividis, Operation and Modeling of the MOS Transistor, 2nd Edition
`Van Valkenburg, Analog Filter Design
`Warner and Grung, Semiconductor Device Electronics
`Wolovich, Automatic Control Systems
`Yariv, Optical Electronics in Modern Communications, Sth Edition
`Zak, Systems and Control
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`|:
`i:i
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`

`
`OPWN
`
`PREFACE xxiii
`
`
`PART | DEVICES AND BASIC CIRCUITS 2
`
`5
`
`Introduction to Electronics
`Operational Amplifiers
`63
`Diodes
`139
`MOSField-Effect Transistors (MOSFETs)
`Bipolar Junction Transistors (BJTs)
`377
`
`235
`
`ANALOG AND DIGITAL INTEGRATED
`
`PART II CIRCUITS 542
`
`So©oO
`
`Single-Stage Integrated-Circuit Amplifiers
`Differential and Multistage Amplifiers
`687
`Feedback 791
`Operational-Amplifier and Data-Converter Circuits
`Digital CMOS Logic Circuits
`949
`
`545
`
`877
`
`1o10
`PART Ill SELECTED TOPICS
`
`Memory and AdvancedDigital Circuits
`1073
`Filters and Tuned Amplifiers
`1083
`Signal Generators and Waveform-Shaping Circuits
`Output Stages and Power Amplifiers
`1229
`
`11
`
`12
`
`13
`
`14
`
`1165
`
`APPENDIXES
`
`xXOonmoO}web
`
`VLSI Fabrication Technology A-?
`Two-Port Network Parameters B-7
`
`Some Useful Network Theorems
`
`C-1
`
`Single-Time-Constant Circuits D-1
`s-Domain Analysis: Poles, Zeros, and Bode Plots E-1
`Bibliography F-7
`Standard Resistance Values and Unit Prefixes G-1
`Answersto Selected Problems H-1
`
`INDEX IN-7
`
`
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`
`

`

`
`
`6
`Signals
`Frequency Spectrum of Signals
`Analog andDigital Signals
`10
`Amplifiers
`13
`13
`L4.1 Signal Amplification
`1.4.2 Amplifier Circuit Symbol
`1.4.3 Voltage Gain
`14
`1.4.4 Power Gain and Current Gain
`1.4.5 Expressing Gain in Decibels
`
`1.4.6 The Amplifier Power Supplies
`1.4.7 Amplifier Saturation
`18
`1.4.8 Nonlinear Transfer Characteristics and Biasing
`1.4.9 Symbol Convention
`22
`1.5 Circuit Models for Amplifiers
`1.5.1 Voltage Amplifiers
`23
`1.5.2 Cascaded Amplifiers
`25
`1.5.3 Other Amplifier Types
`27
`1.5.4 Relationships Between the Four Amplifier Models
`1.6 Frequency Response of Amplifiers
`32
`1.6.1 Measuring the Amplifier Frequency Response
`1.6.2 Amplifier Bandwidth
`32
`1.6.3 Evaluating the Frequency Response of Amplifiers
`1.6.4 Single-Time-Constant Networks
`33
`6.5 Classification of Amplifiers Based on Frequency Response
`1.7 Digital Logic Inverters
`40
`40
`7.1 Function of the Inverter
`.7.2 The Voltage Transfer Characteristic (VTC)
`.7.3 Noise Margins
`42
`1.7.4 The Ideal VTC 43
`
`33
`
`38
`
`41
`
`43
`
`1.7.5 Inverter Implementation
`.7.6 PowerDissipation
`45
`.7.7 Propagation Delay
`46
`1.8 Circuit Simulation Using SPICE 49
`Summary
`50
`Problems
`51
`
`PREFACE xxiii
`
`PART | DEVICES AND BASIC CIRCUITS 2
`
`1
`
`Introduction to Electronics
`
`5
`
`Introduction
`
`$5
`
`7
`
`14
`
`15
`15
`16
`
`23
`
`19
`
`27
`
`32
`
`

`

`64
`2.1 The ldealOp Amp
`64
`2.1.1 The Op-Amp Terminals
`2.1.2 Function and Characteristics of the Ideal
`Op Amp
`65
`2.1.3 Differential and Common-ModeSignals
`2.2 The Inverting Configuration
`68
`2.2.1 The Closed-Loop Gain
`69
`2.2.2 Effect of Finite Open-Loop Gain
`2.2.3 Input and Output Resistances
`72
`2.2.4 An Important Application—The Weighted Summer
`2.3. The Noninverting Configuration
`77
`77
`2.3.1 The Closed-Loop Gain
`2.3.2 Characteristics of the Noninverting
`Configuration
`78
`2.3.3 Effect of Finite Open-Loop Gain
`2.3.4 The Voltage Follower
`79
`2.4 Difference Amplifiers
`8Z
`82
`2.4.1 A Single Op-Amp Difference Amplifier
`2.4.2 A Superior Circuit—The Instrumentation Amplifier
`2.5 Effect of Finite Open-Loop Gain and Bandwidth on
`Circuit Performance
`89
`2.5.1 Frequency Dependence of the Open-Loop Gain
`2.5.2 Frequency Response of Closed-Loop Amplifiers
`2.6 Large-Signal Operation of Op Amps
`94
`2.6.1 Output Voltage Saturation
`94
`2.6.2 Output Current Limits
`94
`2.6.3 Slew Rate
`95
`2.6.4 Full-Power Bandwidth
`
`67
`
`71
`
`78
`
`75
`
`85-
`
`89
`9/
`
`
`
`DETAILED TABLE OF CONTENTS
`
`2 Operational Amplifiers
`
`63
`
`Introduction
`
`63
`
`97
`
`98
`2.7 DC Imperfections
`98
`2.7.1 Offset Voltage
`102
`2.7.2 Input Bias and Offset Currents
`2.8 Integrators and Differentiators.105
`2.8.1 The Inverting Configuration with General Impedances
`105
`2.8.2 The Inverting Integrator
`107
`2.8.3 The Op-Amp Differentiator
`112
`2.9 The SPICE Op-Amp Model and Simulation Examples
`2.9.1 Linear Macromodel
`115
`2.9.2 Nonlinear Macromodel
`119
`Summary
`122
`Problems
`123
`
`114
`
`3 Diodes
`
`139
`
`Introduction
`
`139
`
`140
`3.1 The Ideal Diode
`140
`3.1.1 Current-Voltage Characteristic
`J41
`3.1.2 A Simple Application: The Rectifier
`3.1.3 Another Application: Diode Logic Gates
`
`144
`
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`

`

`DETAILED TABLE OF CONTENTS
`
`
`
`3.2
` Terminal Characteristics of Junction Diodes
`147
`
`
`3.2.1 The Forward-Bias Region
`148
`3.2.2 The Reverse-Bias Region
`152
`3.2.3 The Breakdown Region
`152
`Modeling the Diode Forward Characteristic
`3.3.1 The Exponential Model
`153
`3.3.2 Graphical Analysis Using the Exponential Model
`3.3.3 Iterative Analysis Using the Exponential Model
`3.3.4 The Need for Rapid Analysis
`155
`3.3.5 The Piecewise-Linear Model
`155
`3.3.6 The Constant-Voltage-Drop Model
`3.3.7 The Ideal-Diode Model
`158
`3.3.8 The Small-Signal Model
`159
`3.3.9 Use of the Diode Forward Drop in
`Voltage Regulation
`163
`3.3.10 Summary
`165
`Operation in the Reverse Breakdown Region—
`Zener Diodes
`167
`3.4.1 Specifying and Modeling the Zener Diode
`3.4.2 Use ofthe Zener as a Shunt Regulator
`168
`3.4.3 Temperature Effects
`170
`3.4.4 A Final Remark
`171
`
`153
`
`154
`154
`
`157
`
`167
`
`
`
`
` SaitSeeoin
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`
`
`
`
`
`3.3
`
`3.4
`
`3.6
`
`3.8
`
`3.9
`
`171
`Rectifier Circuits
`3.5.1 The Half-Wave Rectifier
`3.5.2 The Full-Wave Rectifier
`3.5.3 The Bridge Rectifier
`176
`3.5.4 The Rectifier with a Filter Capacitor-—
`The Peak Rectifier
`177
`3.5.5 Precision Half-Wave Rectifier—
`The Super Diode
`183
`Limiting and Clamping Circuits
`3.6.1 Limiter Circuits
`184
`3.6.2 The Clamped Capacitor or DC Restorer
`3.6.3 The Voltage Doubler
`189
`Physical Operation of Diodes
`190
`190
`3.7.1 Basic Semiconductor Concepts
`3.7.2 The pr Junction Under Open-Circuit Conditions
`3.7.3 The pa Junction Under Reverse-Bias Conditions
`3.7.4 The pa Junction in the Breakdown Region
`203
`3.7.5 The pr Junction Under Forward-Bias
`Conditions
`204
`3.7.6 Summary
`208
`Special Diode Types
`209
`3.8.1 The Schottky-Barrier Diode (SBD)
`3.8.2 Varactors
`210
`3.8.3 Photodiodes
`210
`211
`3.8.4 Light-Emitting Diodes (LEDs)
`The SPICE Diode Model and Simulation Examples
`3.9.1 The Diode Model
`212
`3.9.2 The Zener Diode Model
`Summary
`217
`Problems
`2/8
`
`172
`174
`
`184
`
`187
`
`196
`199
`
`212
`
`210
`
`213
`
`
`
`

`

`
`
`4 MOSField-Effect Transistors (MOSFETs)
`
`235
`
`Introduction
`
`235
`
`DETAILED TABLE OF CONTENTS
`
`
`
`236
`
`243
`
`259
`
`|
`i
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`r
`!
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`:
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`4.1 Device Structure and Physical Operation
`4.1.1 Device Structure
`236
`238
`4.1.2 Operation with No Gate Voltage
`4.1.3 Creating a Channel for Current Flow 238
`4.1.4 Applying a Small up,
`239
`24]
`4.1.5 Operation as ups Is Increased
`4.1.6 Derivation ofthe ip—vps Relationship
`4.1.7 The p-Channel MOSFET
`247
`|
`
`4 4.1.8 Complementary MOS or CMOS=247
`|
`4.1.9 Operating the MOSTransistorin the Subthreshold Region
`248
`4.2 Current-Voltage Characteristics
`248
`4.2.1 Circuit Symbol
`248
`249
`4.2.2 The iy—vps Characteristics
`253
`4.2.3 Finite Output Resistance in Saturation
`4.2.4 Characteristics of the p-Channel MOSFET 256
`4.2.5 The Role of the Substrate—The Body Effect
`258
`4.2.6 Temperature Effects
`259
`4.2.7 Breakdown and Input Protection
`4.2.8 Summary
`260
`4.3, MOSFETCircuits at DC 262
`270
`4.4 The MOSFETas an Amplifier and asa Switch
`4.4.1 Large-Signal Operation—TheTransfer Characteristic
`4.4.2 Graphical Derivation of the Transfer Characteristic
`273
`4.4.3 Operation asa Switch
`274
`274
`4.4.4 Operation as a Linear Amplifier
`4.4.5 Analytical Expressions for the Transfer Characteristic
`4.4.6 A Final Remark on Biasing
`280
`4.5 Biasing in MOS Amplifier Circuits
`280
`4.5.1 Biasing by Fixing Vo;
`280
`4.5.2 Biasing by Fixing V;, and Connecting a Resistance
`inthe Source
`28]
`
`27]
`
`275
`
`284
`
`290
`
`4.5.3 Biasing Using a Drain-to-Gate Feedback Resistor
`4.5.4 Biasing Using a Constant-Current Source
`285
`4.5.5 A Final Remark
`287
`4.6 Small-Signal Operation and Models
`4.6.1 The DC Bias Point
`287
`4.6.2 The Signal Current in the Drain Terminal
`4.6.3 The Voltage Gain
`289
`4.6.4 Separating the DC Analysis and the Signal Analysis
`4.6.5 Small-Signal Equivalent-Circuit Models
`290
`4.6.6 The Transconductance g,,
`292
`4.6.7 The T Equivalent-Circuit Model
`4.6.8 Modeling the Body Effect
`296
`4.6.9 Summary
`297
`4.7 Single-Stage MOS Amplifiers
`4.7.1 The Basic Structure
`299
`
`287
`
`288
`
`295
`
`299
`
`
`
`/
`
`301
`4.7.2 Characterizing Amplifiers
`306
`4.7.3 The Common-Source (CS) Amplifier
`4.7.4 The Common-Source Amplifier with a Source Resistance
`
`309
`
`
`
`

`

`
`
`
`
`DETAILED TABLE OF CONTENTS
`
`320
`
`
`
`
`
`31J
`4.7.5 The Common-Gate (CG) Amplifier
`4.7.6 The Common-Drain or Source-Follower Amplifier
`4.7.7 Summary and Comparisons
`318
`The MOSFETInternal Capacitances and High-Frequency Model
`4.8.1 The Gate Capacitive Effect
`32/
`4.8.2 The Junction Capacitances
`322
`322
`4.8.3 The High-Frequency MOSFET Model
`4.8.4 The MOSFETUnity-Gain Frequency (f,)
`324
`4.8.5 Summary
`325
`Frequency Response of the CS Amplifier
`4.9.1 The Three Frequency Bands
`326
`4.9.2 The High-Frequency Response
`328
`4.9.3 The Low-Frequency Response
`332
`4.9.4 AFinal Remark
`336
`The CMOSDigital Logic Inverter
`4.10.1 Circuit Operation
`337
`4.10.2 The Voltage Transfer Characteristic
`4.10.3 Dynamic Operation
`342
`4.10.4 Current Flow and PowerDissipation’
`4.10.5 Summary
`346
`The Depietion-Type MOSFET 346
`The SPICE MOSFET Model and Simulation Example
`4.12.1 MOSFET Models
`351
`4.12.2 MOSFET Model Parameters
`Summary
`359
`Problems
`360
`
`326
`
`339
`
`345
`
`336
`
`352
`
`315
`
`351
`
`5 Bipolar Junction Transistors (BJTs)
`
`377
`
`Introduction 377
`
`378
`Device Structure and Physical Operation
`378
`5.1.1 Simplified Stwucture and Modes of Operation
`5.1.2 Operation ofthe npn Transistor in the Active Mode
`5.1.3 Structure of Actual Transistors
`386
`5.1.4 The Ebers-Moll (EM) Model
`387
`5.1.5 Operation in the Saturation Mode
`5.1.6 The pnp Transistor
`391
`392
`Current-Voltage Characteristics
`392
`§.2.1 Circuit Symbols and Conventions
`5.2.2 Graphical Representation of Transistor Characteristics
`5.2.3 Dependenceof i¢ on the Collector Voltage—The Early
`Effect
`399
`5.2.4 The Common-Emitter Characteristics
`5.2.5 Transistor Breakdown
`406
`5.2.6 Summary
`407
`407
`The BJT as an Amplifier and asa Switch
`5.3.1 Large-Signal Operation—The Transfer Characteristic
`5.3.2 Amplifier Gain
`41/2
`5.3.3 Graphical Analysis
`5.3.4 Operation as a Switch
`BJT Circuits at DC 42]
`
`390
`
`401
`
`380
`
`397
`
`410
`
`4/5
`419
`
`4.8
`
`4.9
`
`4.10
`
`4.1]
`4.12
`
`5.1
`
`5.2
`
`5.3
`
`5.4
`
`
`
`

`

`DETAILED TABLE OF CONTENTS
`
`436
`5.5 Biasing in BJT Amplifier Circuits
`5.5.1 The Classical Discrete-Circuit Bias
`Arrangement
`436
`5.5.2 A Two-Power-Supply Version ofthe Classical Bias
`Arrangement
`440
`5.5.3 Biasing Using a Collector-to-Base Feedback Resistor
`5.5.4 Biasing Using a Constant-Current Source
`442
`5.6 Small-Signal Operation and Models
`443
`5.6.1 The Collector Current and the
`Transconductance
`443
`
`44J
`
`5.6.2 The Base Current andthe Input Resistance
`atthe Base
`445
`
`5.6.3 The Emitter Current and the Input Resistance
`atthe Emitter
`446
`
`447
`5.6.4 Voltage Gain
`5.6.5 Separating the Signal and the DC Quantities
`5.6.6 The Hybrid-27 Model
`448
`5.6.7 The T Model
`449
`
`448
`
`5.6.8 Application of the Small-Signal Equivalent Circuits
`5.6.9 Performing Small-Signal Analysis Directly on the
`Circuit Diagram 457
`5.6.10 Augmenting the Small-Signal Models to Account
`for the Early Effect
`457
`5.6.11 Summary
`458
`5.7 Single-Stage BJT Amplifiers
`5.7.1 The Basic Structure
`
`460
`460
`
`450
`
`461
`5.7.2 Characterizing BJT Amplifiers
`467
`5.7.3 The Common-Emitter (CE) Amplifier
`5.7.4 The Common-Emitter Amplifier with an Emitter
`Resistance
`470
`
`475
`5.7.5 The Common-Base (CB) Amplifier
`5.7.6 The Common-Collector (CC) Amplifier or
`Emitter Follower
`478
`
`485
`
`483
`5.7.7 Summary and Comparisons
`5.8 The BJT Internal Capacitances and High-Frequency Model
`5.8.1 The Base-Charging or Diffusion Capacitance C,,
`486
`5.8.2 The Base-Emitter Junction Capacitance C;,
`486
`5.8.3 The Collector-Base Junction Capacitance C,
`487
`5.8.4 The High-Frequency Hybrid-2 Model
`487
`5.8.5 The Cutoff Frequency
`487
`5.8.6 Summary
`490
`5.9 Frequency Response of the Common-Emitter Amplifier
`5.9.1 The Three Frequency Bands
`497
`5.9.2 The High-Frequency Response
`492
`5.9.3 The Low-Frequency Response
`497
`5.9.4 A Final Remark
`503
`
`491
`
`
`
`
`
`
`
`503
`5.10 The Basic BJT Digital Logic Inverter
`504
`5.10.1 The Voltage Transfer Characteristic
`5.10.2 Saturated Versus Nonsaturated BJT Digital Circuits
`5.11 The SPICE BJT Model and Simulation Examples
`507
`5.11.1 The SPICE Ebers-Moll Model of the BJT
`507
`5.11.2 The SPICE Gummel-Poon Model of the BIT
`509
`5.11.3 The SPICE BJT Model Parameters
`510
`5.11.4 The BIT Model Parameters BF and BR in SPICE
`
`505
`
`5/0
`
`
`
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`

`
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`DETAILED TABLE OF CONTENTS
`
`
`
`
`
`Summary
`Problems
`
`516
`517
`
`ANALOG AND DIGITAL INTEGRATED
`CIRCUITS 542
`
`
`
`
`
`PART Il
`
`6 Single-Stage Integrated-Circuit Amplifiers
`
`545
`
`Introduction
`
`545
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`
`546
`IC Design Philosophy
`6.1
`6.2 Comparison of the MOSFETandthe BJT 547
`6.2.1 Typical Values of MOSFET Parameters
`547
`6.2.2 Typical Values of IC BJT Parameters
`548
`6.2.3 Comparison of Important Characteristics
`550
`6.2.4 Combining MOSand Bipolar Transistors—BiCMOS
`Circuits
`561
`6.2.5 Validity of the Square-Law MOSFET Model
`6.3 IC Biasing—Current Sources, Current Mirrors, and
`Current-Steering Circuits
`562
`6.3.1 The Basic MOSFET Current Source
`6.3.2 MOS Current-Steering Circuits
`565
`6.3.3 BJT Circuits
`567
`6.4 High-Frequency Response—General Considerations
`6.4.1 The High-Frequency Gain Function
`572
`6.4.2 Determining the 3-dB Frequency fy,
`573
`6.4.3 Using Open-Circuit Time Constants for the Approximate
`Determination offf,
`575
`6.4.4 Miller’s Theorem 578
`6.5 The Common-Source and Common-Emitter Amplifiers with Active
`Loads
`582
`582
`6.5.1 The Common-Source Circuit
`6.5.2 CMOS Implementation of the Common-Source Amplifier
`6.5.3 The Common-Emitter Circuit
`588
`6.6 High-Frequency Response of the CS and CE Amplifiers
`6.6.1 Analysis Using Miller’s Theorem 589
`6.6.2 Analysis Using Open-Circuit Time Constants
`6.6.3 Exact Analysis
`591
`6.6.4 Adapting the Formulas for the Case of the CE Amplifier
`6.6.5 The Situation When Ry, Is Low 597
`6.7 The Common-Gate and Common-Base Amplifiers with
`Active Loads
`600
`6.7.1 The Common-Gate Amplifier
`6.7.2 The Common-Base Amplifier
`6.7.3 A Concluding Remark
`613
`613
`6.8 The Cascode Amplifier
`6.8.1 The MOS Cascode
`614
`6.8.2 Frequency Response of the MOS Cascode
`6.8.3 The BIT Cascode
`623
`6.8.4 A Cascode Current Source
`6.8.5 Double Cascoding
`626
`6.8.6 The Folded Cascode
`627
`
`6.8.7 BiCMOS Cascodes
`628
`
`562
`
`562
`
`571
`
`583
`
`588
`
`595
`
`590
`
`600
`610
`
`625
`
`618
`
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`

`DETAILED TABLE OF CONTENTS
`
`629
`
`6.9 The CS and CE Amplifiers with Source (Emitter) Degeneration
`6.9.1 The CS Amplifier with a Source Resistance
`629
`6.9.2 The CE Amplifier with an Emitter Resistance
`633
`6.10 The Source and Emitter Followers
`635
`6.10.1 The Source Follower
`635
`6.10.2 Frequency Response of the Source Follower
`6.10.3 The Emitter Follower
`639
`641
`6.11 Some Useful Transistor Pairings
`6.11.4 The CD-—CS, CC-CE and CD-CE Configurations
`6.11.2 The Darlington Configuration
`645
`6.11.3 The CC-CB and CD-CG Configurations
`6.12 Current-Mirror Circuits with Improved
`Performance
`649
`649
`6.12.1 Cascode MOS Mirrors
`6.12.2 A Bipolar Mirror with Base-Current Compensation
`6.12.3 The Wilson Current Mirror
`651
`6.12.4 The Wilson MOS Mirror
`652
`6.12.5 The Widlar Current Source
`653
`
`637
`
`646
`
`641
`
`650
`
`6.13 SPICE Simulation Examples
`Summary
`665
`Problems
`666
`
`656
`
`7 Differential and Multistage Amplifiers
`
`687
`
`Introduction
`
`687
`
`
`
`
`
`691
`
`696
`
`688
`7.1. The MOS Differential Pair
`7.1.1 Operation with a Common-Mode Input
`Voltage
`689
`7.1.2 Operation with a Differential Input Voltage
`7.1.3 Large-Signal Operation
`693
`7.2 Small-Signal Operation of the MOS Differential Pair
`7.2.1 Differential Gain
`697
`7.2.2. Common-Mode Gain and Common-Mode Rejection Ratio
`(CMRR)
`700
`704
`7.3 The BJT Differential Pair
`704
`7.3.1 Basic Operation
`707
`7.3.2 Large-Signal Operation
`709
`7.3.3 Small-Signal Operation
`7.4 Other Nonideal Characteristics of the Differential
`Amplifier
`720
`7.4.1 Input Offset Voltage of the MOS Differential Pair
`7.4.2 Input Offset Voltage of the Bipolar Differential Pair
`7.4.3 Input Bias and Offset Currents of the Bipolar Pair
`‘7.4.4 Input Common-Mode Range
`726
`7.4.5 A Concluding Remark
`726
`7.5 The Differential Amplifier with Active Load
`7.5.1 Differential-to-Single-Ended Conversion
`7.5.2 The Active-Loaded MOSDifferential Pair
`7.5.3 Differential Gain of the Active-Loaded
`MOS Pair
`729
`7.5.4 Common-Mode Gain and CMRR=732
`7.5.5 The Bipolar Differential Pair with Active Load
`733
`
`720
`723
`725
`
`727
`727
`728
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`

`DETAILED TABLE OF CONTENTS
`
`
`740
`7.6 Frequency Responseofthe Differential Amplifier
`7.6.1 Analysis of the Resistively Loaded MOS Amplifier
`7.6.2 Analysis of the Active-Loaded MOS Amplifier
`744
`7.7 Multistage Amplifiers
`749
`7.71 A Two-Stage CMOS Op Amp
`7.7.2 ABipolarOp Amp
`758
`7.8 SPICE Simulation Example
`767
`Summary
`773
`Problems
`775
`
`749
`
`740
`
`
`
`8 Feedback 791
`
`Introduction
`
`79]
`
`795
`
`797
`798
`
`792
`8.1 The General Feedback Structure
`8.2 Some Properties of Negative Feedback
`8.2.1 Gain Desensitivity
`795
`8.2.2 Bandwidth Extension
`795
`8.2.3 Noise Reduction
`796
`8.2.4 Reduction in Nonlinear Distortion
`8.3. The Four Basic Feedback Topologies
`8.3.1 Voltage Amplifiers
`799
`8.3.2 Current Amplifiers
`799
`801
`8.3.3 Transconductance Amplifiers
`802
`8.3.4 Transresistance Amplifiers
`8.4 The Series~Shunt Feedback Amplifier
`8.4.1 The Ideal Situation
`802
`8.4.2 The Practical Situation
`8.4.3 Summary
`807
`8.5 The Series—Series Feedback Amplifier 8JJ
`8.5.1 The Ideal Case
`811
`8.5.2 The Practical Case
`
`802
`
`804
`
`812
`
`814
`8.5.3 Summary
`8.6 The Shunt-Shunt and Shunt-Series Feedback
`Amplifiers 8/8
`8.6.1 The Shunt-Shunt Configuration
`8.6.2 AnImportant Note
`823
`8.6.3 The Shunt—Series Configuration
`8.6.4 Summary of Results
`837
`8.7 Determining the Loop Gain
`831
`831
`8.7.1 An Alternative Approach for Finding AB
`8.7.2 Equivalence of Circuits from a Feedback-Loop
`Point of View 833
`
`819
`
`823
`
`8.8 The Stability Problem 834
`8.8.1 Transfer Function of the Feedback Amplifier
`8.8.2 The Nyquist Plot
`835
`8.9 Effect of Feedback on the Amplifier Poles
`8.9.1 Stability and Pole Location
`837
`838
`8.9.2 Poles of the Feedback Amplifier
`8.9.3 Amplifier with Single-Pole Response
`8.9.4 Amplifier with Two-Pole Response
`8.9.5 Amplifiers with Three or More Poles
`
`838
`839
`843
`
`836
`
`834
`
`
`
`

`

`DETAILED TABLE OF CONTENTS
`
`845
`8.10 Stability Study Using Bode Plots
`845
`8.10.1 Gain and Phase Margins
`8.10.2 Effect of Phase Margin on Closed-Loop Response
`8.10.3 An Alternative ApproachforInvestigating Stability
`8.11 Frequency Compensation
`849
`8.11.1 Theory
`850
`851
`8.11.2 Implementation
`8.11.3 Miller Compensation and Pole Splitting
`8.12 SPICE Simulation Example
`855
`Summary
`859
`Problems
`860
`
`852
`
`846
`847
`
`9 Operationa!-Amplifier and Data-Converter Circuits
`
`877
`
`Introduction
`
`87]
`
`9.1 The Two-Stage CMOS Op Amp
`9.1.1 The Circuit
`872
`9.1.2 Input Common-Mode Range and Output Swing
`9.1.3 Voltage Gain
`874
`9.1.4 Frequency Response
`9.1.5 Slew Rate
`879
`
`872
`
`876
`
`873
`
`888
`
`9.2 The Folded-Cascode CMOS Op Amp
`9.2.1 The Circuit
`883
`9.2.2 Input Common-Mode Rangeand the Output
`Voltage Swing
`885
`9.2.3 Voltage Gain
`886
`9.2.4 Frequency Response
`9.2.5 Slew Rate
`888
`9.2.6 Increasing the Input Common-Mode Range:
`Rail-to-Rail Input Operation
`890
`9.2.7 Increasing the Output Voltage Range:
`The Wide-Swing Current Mirror
`892
`9.3. The 741 Op-Amp Circuit
`893
`9.3.1 Bias Circuit
`893
`9.3.2 Short-Circuit Protection Circuitry
`9.3.3 The Input Stage
`895
`9.3.4 The Second Stage
`895
`9.3.5 The Output Stage
`896
`9.3.6 Device Parameters
`898
`
`883
`
`895
`
`
`
`|
`
`|
`
`
`
`
`899
`
`899
`9.4 DC Analysis of the 741
`9.4.1 Reference Bias Current
`9.4.2 Input-Stage Bias
`899
`9.4.3 Input Bias and Offset Currents
`9.4.4 Input Offset Voltage
`902
`9.4.5 Input Common-Mode Range
`9.4.6 Second-Stage Bias
`902
`9.4.7 Output-Stage Bias
`903
`9.4.8 Summary
`904
`9.5 Small-Signal Analysis of the 741
`9.5.1 The Input Stage
`905
`9.5.2 The Second Stage
`910
`9.5.3 The Output Stage
`912
`
`902
`
`902
`
`905
`
`
`
`

`

`DETAILED TABLE OF CONTENTS
`
`917
`
`924
`
`925
`
`
`
`Introduction
`949
`10.1 Digital Circuit Design: An Overview 950
`10.1.1 Digital IC Technologies and Logic-Circuit Families
`10.1.2 Logic-Circuit Characterization
`952
`10.1.3 Styles for Digital System Design
`954
`955
`10.1.4 Design Abstraction and Computer Aids
`10.2 Design and Performance Analysis of the CMOSInverter
`0.2.1 Circuit Structure
`955
`0.2.2 Static Operation
`956
`0.2.3 Dynamic Operation
`958
`0.2.4 Dynamic PowerDissipation
`10.3 CMOSLogic-Gate Circuits
`963
`0.3.1 Basic Structure
`963
`0.3.2 The Two-Input NOR Gate
`0.3.3 The Two-Input NAND Gate
`0.3.4 A Complex Gate
`967
`0.3.5 Obtaining the PUN from the PDN and Vice Versa
`10.3.6 The Exclusive-OR Function
`969
`0.3.7 Summaryofthe Synthesis Method
`970
`10.3.8 Transistor Sizing
`970
`10.3.9 Effects of Fan-In and Fan-Out on Propagation Delay
`10.4. Pseudo-NMOSLogic Circuits
`974
`10.4.1 The Pseudo-NMOSInverter
`10.4.2 Static Characteristics
`975
`
`9.6 Gain, Frequency Response, and Slew Rate of the 741
`9.6.1 Small-Signal Gain
`917
`9,6.2 Frequency Response
`917
`9.6.3 A Simplified Model
`918
`9.6.4 Slew Rate
`919
`9.6.5 Relationship Between f, and SR
`9.7 Data Converters—AnIntroduction
`9.7.1 Digital Processing of Signals
`9.7.2 Sampling of AnalogSignals
`9,7.3 Signal Quantization
`924
`9.7.4 The A/D and D/A Converters as Functional Blocks
`9.8 D/A Converter Circuits
`925
`9.8.1 Basic Circuit Using Binary-Weighted Resistors
`9.8.2 R-2R Ladders
`926
`9.8.3 A Practical Circuit Implementation
`9.8.4 Current Switches
`928
`9.9 A/D Converter Circuits
`929
`929
`9.9.1 The Feedback-Type Converter
`930
`9.9.2 The Dual-Slope A/D Converter
`932
`9.9.3 The Parallel or Flash Converter
`9.9.4 The Charge-Redistribution Converter
`9.10 SPICE Simulation Example
`934
`Summary
`940
`Problems
`941
`
`920
`922
`922
`922
`
`927
`
`932
`
`40 Digital CMOSLogic Circuits
`
`949
`
`961
`
`966
`966
`
`974
`
`:
`950
`
`955
`
`968
`
`973
`
`

`

`10.4.3 Derivation of the VTC
`
`976
`
`DETAILED TABLE OF CONTENTS
`
`
`
`10.4.4 Dynamic Operation
`10.4.5 Design
`979
`10.4.6 Gate Circuits
`
`980
`
`
`
`979
`
`980
`10.4.7 Concluding Remarks
`982
`10.5 Pass-Transistor Logic Circuits
`983
`10.5.{ An Essential Design Requirement
`984
`10.5.2 Operation with NMOSTransistors as Switches
`10.5.3 The Use of CMOS Transmission Gates as Switches
`988
`
`10.5.4 Pass-Transistor Logic Circuit Examples
`10.5.5 A Final Remark
`997
`
`990
`
`10.6 Dynamic Logic Circuits
`10.6.1 Basic Principle
`10.6.2 Nonideal Effects
`
`991
`992
`993
`
`10.6.3 Domino CMOS Logic
`10.6.4 Concluding Remarks
`10.7 Spice Simulation Example
`Summary
`1002
`Problems
`1002
`
`996
`998
`998
`
` PART Ii] SELECTED TOPICS 1010
`41 Memory and AdvancedDigital Circuits
`
`1073
`
`Introduction 013
`
`1014
`{1.1 Latches and Flip-flops
`11.1.1 The Latch
`1014
`
`1015
`{1.1.2 The SR Flip-Flop
`1016
`11.1.3 CMOS Implementation of SR Flip-Flops
`I
`.L.4 A Simpler CMOS Implementation ofthe Clocked SR Flip-
`Flop
`1019
`11.1.5 D Flip-Flop Circuits 019
`{1.2 Multivibrator Circuits
`1021
`11.2.1 ACMOS Monostable Circuit
`11.2.2 An Astable Circuit
`1026
`
`1022
`
`
`
`1028
`
`1027
`11.2.3 The Ring Oscillator
`11.3. Semiconductor Memories: Types and Architectures
`11.3.1 Memory-Chip Organization
`1028
`11.3.2 Memory-Chip Timing
`1030
`{1.4 Random-Access Memory (RAM) Cells
`wanes
`A.1 Static Memory Cell
`031
`4.2 Dynamic Memory Cell
`1036
`{1.5 Sense Amplifiers and Address Decoders
`11.5.1 The Sense Amplifier
`1038
`1043
`11.5.2 The Row-Address Decoder
`11.5.3 The Column-Address Decoder
`1045
`
`1031
`
`1038
`
`1049
`.6.2 Mask-Programmable ROMs
`.6.3 Programmable ROMs (PROMs and EPROMs)
`
`1049
`
`
`
`
`
`1046
`{1.6 Read-Only Memory (ROM)
`6.1 AMOS ROM—1047
`
`
`
`

`

`
`
`
`
`
`
`1062
`
`1066
`
`1083
`
`DETAILED TABLE OF CONTENTS
`1052
`11.7. Emitter-Coupled Logic (ECL)
`11.7.1 The Basic Principle
`1052
`11.7.2 ECL Families
`1053
`1053
`11.7.3 The Basic Gate Circuit
`1057
`11.7.4 Voltage Transfer Characteristics
`11.7.5 Fan-Out
`1061
`11.7.6 Speed of Operation and Signal Transmission
`11.7.7 Power Dissipation
`1063
`11.7.8 Thermal Effects
`1063
`11.7.9 The Wired-OR Capability
`11.7.10 Some Final Remarks
`1066
`11.8 BiCMOSDigital Circuits
`1067
`11.8.1 The BiCMOSInverter
`1067
`11.8.2 Dynamic Operation
`1069
`11.8.3 BiCMOSLogic Gates
`1070
`11.9 SPICE Simulation Example
`1071
`Summary
`1076
`Problems
`1077
`42 Filters and Tuned Amplifiers
`Introduction
`1083
`12.1 Filter Transmission, Types, and Specification
`12.1.1 Filter Transmission
`1084
`{2.1.2 Filter Types
`1085
`1085
`12.1.3 Filter Specification
`I08s
`12.2 The Filter Transfer Function
`12.3 Butterworth and Chebyshev Filters
`12.3.1 The Butterworth Filter
`091
`12.3.2 The Chebyshev Filter
`1095
`12.4 First-Order and Second-Order Filter Functions
`12.4.1 First-Order Filters
`1098
`12.4.2. Second-Order Filter Functions
`1101
`12.5 The Second-Order LCR Resonator
`1106
`12.5.1 The Resonator Natural Modes
`1106
`12.5.2 Realization of Transmission Zeros
`1107
`12.5.3 Realization of the Low-Pass Function
`1108
`12.5.4 Realization of the High-Pass Function
`1108
`12.5.5 Realization of the Bandpass Function
`1108
`12.5.6 Realization of the Notch Functions
`1110
`12.5.7 Realization of the All-Pass Function Uil
`12.6 Second-Order Active Filters Based on Inductor
`Replacement
`J] 12
`12.6.1 The Antoniou Inductance-Simulation Circuit
`12.6.2. The Op Amp-RC Resonator
`1114
`12.6.3 Realization of the Various Filter Types
`1114
`12.6.4 The All-Pass Circuit
`1118
`Integrator-Loop
`12.7 Second-Order Active Filters Based on the Two-
`Topology
`1120
`12.7.1 Derivation of the Two-Integrator-Loop Biquad
`12.7.2. Circuit Implementation
`1122
`
`1084
`
`1091
`
`1098
`
`1112
`
`
`
`1120
`
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`

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`
`DETAILED TABLE OF CONTENTS
`
`{2.7.3 An Alternative Two-Integrator-Loop Biquad
`Circuit
`1123
`{2.7.4 Final Remarks
`
`1125
`
`1125
`
`12.8 Single-Amplifier Biquadratic Active Filters
`12.8.1 Synthesis of the Feedback Loop
`1126
`12.8.2 Injecting the Input Signal
`1128
`12.8.3 Generation of Equivalent Feedback Loops
`12.9 Sensitivity
`1133
`{2.10 Switched-Capacitor Filters
`{2.10.1 The Basic Principle
`12.10.2 Practical Circuits
`12.10.3 A Final Remark
`
`1136
`1136
`1137
`J14]
`
`1130
`
`q
`|
`|
`
`1141
`{2.11 Tuned Amplifiers
`1141
`12.11.1 The Basic Principle
`{2.11.2 Inductor Losses
`1143
`12.11.3 Use of Transformers
`
`1144
`
`{2.11.4 Amplifiers with Multiple Tuned Circuits
`12.11.5 The Cascode and the CC-CB Cascade
`
`1145
`1146
`
`{2.11.6 Synchronous Tuning
`12.11.7 Stagger-Tuning
`1148
`12.12 SPICE Simulation Examples
`Summary
`1158
`Problems
`1159
`
`1147
`
`1152
`
`13 Signal Generators And Waveform-Shaping Circuits
`
`1165
`
`Introduction
`
`1165
`
`13.1 Basic Principles of Sinusoidal Oscillators
`13.1.1 The Oscillator Feedback Loop
`1166
`13.1.2 The Oscillation Criterion
`1167
`
`1166
`
`1168
`13.1.3 Nonlinear Amplitude Control
`13.1.4 A Popular Limiter Circuit for Amplitude Control
`13.2 Op Amp-RC Oscillator Circuits
`1171
`3.2.1 The Wien-Bridge Oscillator
`1171
`{3.2.2 The Phase-Shift Oscillator
`1174
`
`1169
`
`
`
`1176
`3.2.3 The Quadrature Oscillator
`3.2.4 The Active-Filter-Tuned Oscillator
`3.2.5 A Final Remark
`1179
`
`1177
`
`13.3. LC and Crystal Oscillators
`3.3.1 LC-TunedOscillators
`
`1179
`1179
`
`3.3.2 Crystal Oscillators
`13.4 Bistable Multivibrators
`
`1182
`1185
`
`1185
`3.4.1 The Feedback Loop
`3.4.2 Transfer Characteristics of the Bistable Circuit
`
`1186
`
`1187
`3.4.3 Triggering the Bistable Circuit
`1188
`3.4.4 The Bistable Circuit asa Memory Element
`3.4.5 A Bistable Circuit with Noninverting Transfer
`Characteristics
`1188
`
`3.4.6 Application of the Bistable Circuit as a
`Comparator
`1189
`3.4.7 Making the Output Levels More Precise
`
`1191
`
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`DETAILED TABLE OF CONTENTS
`
`1205
`
`1207
`
`1209
`
`1213
`
`14 Output Stages and Power Amplifiers
`
`1229
`
`1212
`
`13.5 Generation of Square and Triangular Waveforms Using Astable
`Multivibrators
`1192
`1192
`13.5.1 Operation of the Astable Multivibrator
`1194
`13.5.2 Generation of Triangular Wav